prev_cmp_led.qmsg

来自「用VHDL开发的数字钟资料 完整的实验代码」· QMSG 代码 · 共 127 行 · 第 1/5 页

QMSG
127
字号
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "d1\[6\] led.vhd(48) " "Info (10041): Inferred latch for \"d1\[6\]\" at led.vhd(48)" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 48 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "b\[0\] " "Warning: Latch b\[0\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA s\[1\] " "Warning: Ports D and ENA on the latch are fed by the same signal s\[1\]" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 9 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0 0}  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 21 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "b1\[0\] " "Warning: Latch b1\[0\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA s1\[1\] " "Warning: Ports D and ENA on the latch are fed by the same signal s1\[1\]" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 10 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0 0}  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 22 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "c\[0\] " "Warning: Latch c\[0\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA m\[1\] " "Warning: Ports D and ENA on the latch are fed by the same signal m\[1\]" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 11 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0 0}  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 23 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "c1\[0\] " "Warning: Latch c1\[0\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA m1\[1\] " "Warning: Ports D and ENA on the latch are fed by the same signal m1\[1\]" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 12 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0 0}  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 24 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "d\[0\] " "Warning: Latch d\[0\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA h\[1\] " "Warning: Ports D and ENA on the latch are fed by the same signal h\[1\]" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 13 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0 0}  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 25 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "d1\[0\] " "Warning: Latch d1\[0\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA h1\[1\] " "Warning: Ports D and ENA on the latch are fed by the same signal h1\[1\]" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 14 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0 0}  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 26 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "b\[1\] " "Warning: Latch b\[1\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA s\[2\] " "Warning: Ports D and ENA on the latch are fed by the same signal s\[2\]" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 9 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0 0}  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 21 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "b1\[1\] " "Warning: Latch b1\[1\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA s1\[2\] " "Warning: Ports D and ENA on the latch are fed by the same signal s1\[2\]" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 10 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0 0}  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 22 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "c\[1\] " "Warning: Latch c\[1\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA m\[2\] " "Warning: Ports D and ENA on the latch are fed by the same signal m\[2\]" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 11 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0 0}  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 23 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "c1\[1\] " "Warning: Latch c1\[1\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA m1\[2\] " "Warning: Ports D and ENA on the latch are fed by the same signal m1\[2\]" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 12 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0 0}  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 24 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "d\[1\] " "Warning: Latch d\[1\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA h\[2\] " "Warning: Ports D and ENA on the latch are fed by the same signal h\[2\]" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 13 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0 0}  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 25 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "d1\[1\] " "Warning: Latch d1\[1\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA h1\[2\] " "Warning: Ports D and ENA on the latch are fed by the same signal h1\[2\]" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 14 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0 0}  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 26 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "b\[2\] " "Warning: Latch b\[2\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA s\[1\] " "Warning: Ports D and ENA on the latch are fed by the same signal s\[1\]" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 9 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0 0}  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 21 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "b1\[2\] " "Warning: Latch b1\[2\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA s1\[1\] " "Warning: Ports D and ENA on the latch are fed by the same signal s1\[1\]" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 10 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0 0}  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 22 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "c\[2\] " "Warning: Latch c\[2\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA m\[1\] " "Warning: Ports D and ENA on the latch are fed by the same signal m\[1\]" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 11 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0 0}  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 23 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "c1\[2\] " "Warning: Latch c1\[2\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA m1\[1\] " "Warning: Ports D and ENA on the latch are fed by the same signal m1\[1\]" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 12 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0 0}  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 24 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "d\[2\] " "Warning: Latch d\[2\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA h\[1\] " "Warning: Ports D and ENA on the latch are fed by the same signal h\[1\]" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 13 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0 0}  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 25 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "d1\[2\] " "Warning: Latch d1\[2\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA h1\[1\] " "Warning: Ports D and ENA on the latch are fed by the same signal h1\[1\]" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 14 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0 0}  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 26 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "b\[3\] " "Warning: Latch b\[3\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA s\[1\] " "Warning: Ports D and ENA on the latch are fed by the same signal s\[1\]" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 9 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0 0}  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 21 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "b1\[3\] " "Warning: Latch b1\[3\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA s1\[1\] " "Warning: Ports D and ENA on the latch are fed by the same signal s1\[1\]" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 10 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0 0}  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 22 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "c\[3\] " "Warning: Latch c\[3\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA m\[1\] " "Warning: Ports D and ENA on the latch are fed by the same signal m\[1\]" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 11 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0 0}  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 23 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "c1\[3\] " "Warning: Latch c1\[3\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA m1\[1\] " "Warning: Ports D and ENA on the latch are fed by the same signal m1\[1\]" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 12 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0 0}  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 24 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "d\[3\] " "Warning: Latch d\[3\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA h\[1\] " "Warning: Ports D and ENA on the latch are fed by the same signal h\[1\]" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 13 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0 0}  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 25 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "d1\[3\] " "Warning: Latch d1\[3\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA h1\[1\] " "Warning: Ports D and ENA on the latch are fed by the same signal h1\[1\]" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 14 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0 0}  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 26 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "b\[4\] " "Warning: Latch b\[4\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA s\[1\] " "Warning: Ports D and ENA on the latch are fed by the same signal s\[1\]" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 9 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0 "" 0 0}  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/led/led.vhd" 21 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0 "" 0 0}

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