ram.sim.rpt

ram的vhdl源代码在colloy实现

; |ram|q[14]                                                                                                               ; |ram|q[14]                                                                                                          ; padio            ;
; |ram|q[13]                                                                                                               ; |ram|q[13]                                                                                                          ; padio            ;
; |ram|q[12]                                                                                                               ; |ram|q[12]                                                                                                          ; padio            ;
; |ram|q[11]                                                                                                               ; |ram|q[11]                                                                                                          ; padio            ;
; |ram|q[10]                                                                                                               ; |ram|q[10]                                                                                                          ; padio            ;
; |ram|q[9]                                                                                                                ; |ram|q[9]                                                                                                           ; padio            ;
; |ram|q[8]                                                                                                                ; |ram|q[8]                                                                                                           ; padio            ;
; |ram|q[7]                                                                                                                ; |ram|q[7]                                                                                                           ; padio            ;
; |ram|q[6]                                                                                                                ; |ram|q[6]                                                                                                           ; padio            ;
; |ram|q[5]                                                                                                                ; |ram|q[5]                                                                                                           ; padio            ;
; |ram|q[4]                                                                                                                ; |ram|q[4]                                                                                                           ; padio            ;
; |ram|q[3]                                                                                                                ; |ram|q[3]                                                                                                           ; padio            ;
; |ram|q[2]                                                                                                                ; |ram|q[2]                                                                                                           ; padio            ;
; |ram|q[1]                                                                                                                ; |ram|q[1]                                                                                                           ; padio            ;
; |ram|q[0]                                                                                                                ; |ram|q[0]                                                                                                           ; padio            ;
; |ram|ce                                                                                                                  ; |ram|ce                                                                                                             ; combout          ;
+--------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------+------------------+


The following table displays output ports that do not toggle to 0 during simulation.
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Missing 0-Value Coverage                                                                                                                                                                                                                                          ;
+--------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------+------------------+
; Node Name                                                                                                                ; Output Port Name                                                                                                    ; Output Port Type ;
+--------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------+------------------+
; |ram|memory:inst|altsyncram:altsyncram_component|altsyncram_qto1:auto_generated|altsyncram_m5s1:altsyncram1|ram_block2a0 ; |ram|memory:inst|altsyncram:altsyncram_component|altsyncram_qto1:auto_generated|altsyncram_m5s1:altsyncram1|q_a[0]  ; portadataout0    ;
; |ram|memory:inst|altsyncram:altsyncram_component|altsyncram_qto1:auto_generated|altsyncram_m5s1:altsyncram1|ram_block2a0 ; |ram|memory:inst|altsyncram:altsyncram_component|altsyncram_qto1:auto_generated|altsyncram_m5s1:altsyncram1|q_a[1]  ; portadataout1    ;
; |ram|memory:inst|altsyncram:altsyncram_component|altsyncram_qto1:auto_generated|altsyncram_m5s1:altsyncram1|ram_block2a0 ; |ram|memory:inst|altsyncram:altsyncram_component|altsyncram_qto1:auto_generated|altsyncram_m5s1:altsyncram1|q_a[2]  ; portadataout2    ;
; |ram|memory:inst|altsyncram:altsyncram_component|altsyncram_qto1:auto_generated|altsyncram_m5s1:altsyncram1|ram_block2a0 ; |ram|memory:inst|altsyncram:altsyncram_component|altsyncram_qto1:auto_generated|altsyncram_m5s1:altsyncram1|q_a[3]  ; portadataout3    ;
; |ram|memory:inst|altsyncram:altsyncram_component|altsyncram_qto1:auto_generated|altsyncram_m5s1:altsyncram1|ram_block2a0 ; |ram|memory:inst|altsyncram:altsyncram_component|altsyncram_qto1:auto_generated|altsyncram_m5s1:altsyncram1|q_a[4]  ; portadataout4    ;
; |ram|memory:inst|altsyncram:altsyncram_component|altsyncram_qto1:auto_generated|altsyncram_m5s1:altsyncram1|ram_block2a0 ; |ram|memory:inst|altsyncram:altsyncram_component|altsyncram_qto1:auto_generated|altsyncram_m5s1:altsyncram1|q_a[5]  ; portadataout5    ;
; |ram|memory:inst|altsyncram:altsyncram_component|altsyncram_qto1:auto_generated|altsyncram_m5s1:altsyncram1|ram_block2a0 ; |ram|memory:inst|altsyncram:altsyncram_component|altsyncram_qto1:auto_generated|altsyncram_m5s1:altsyncram1|q_a[6]  ; portadataout6    ;
; |ram|memory:inst|altsyncram:altsyncram_component|altsyncram_qto1:auto_generated|altsyncram_m5s1:altsyncram1|ram_block2a0 ; |ram|memory:inst|altsyncram:altsyncram_component|altsyncram_qto1:auto_generated|altsyncram_m5s1:altsyncram1|q_a[7]  ; portadataout7    ;
; |ram|memory:inst|altsyncram:altsyncram_component|altsyncram_qto1:auto_generated|altsyncram_m5s1:altsyncram1|ram_block2a0 ; |ram|memory:inst|altsyncram:altsyncram_component|altsyncram_qto1:auto_generated|altsyncram_m5s1:altsyncram1|q_a[8]  ; portadataout8    ;
; |ram|memory:inst|altsyncram:altsyncram_component|altsyncram_qto1:auto_generated|altsyncram_m5s1:altsyncram1|ram_block2a0 ; |ram|memory:inst|altsyncram:altsyncram_component|altsyncram_qto1:auto_generated|altsyncram_m5s1:altsyncram1|q_a[9]  ; portadataout9    ;
; |ram|memory:inst|altsyncram:altsyncram_component|altsyncram_qto1:auto_generated|altsyncram_m5s1:altsyncram1|ram_block2a0 ; |ram|memory:inst|altsyncram:altsyncram_component|altsyncram_qto1:auto_generated|altsyncram_m5s1:altsyncram1|q_a[10] ; portadataout10   ;
; |ram|memory:inst|altsyncram:altsyncram_component|altsyncram_qto1:auto_generated|altsyncram_m5s1:altsyncram1|ram_block2a0 ; |ram|memory:inst|altsyncram:altsyncram_component|altsyncram_qto1:auto_generated|altsyncram_m5s1:altsyncram1|q_a[11] ; portadataout11   ;
; |ram|memory:inst|altsyncram:altsyncram_component|altsyncram_qto1:auto_generated|altsyncram_m5s1:altsyncram1|ram_block2a0 ; |ram|memory:inst|altsyncram:altsyncram_component|altsyncram_qto1:auto_generated|altsyncram_m5s1:altsyncram1|q_a[12] ; portadataout12   ;
; |ram|memory:inst|altsyncram:altsyncram_component|altsyncram_qto1:auto_generated|altsyncram_m5s1:altsyncram1|ram_block2a0 ; |ram|memory:inst|altsyncram:altsyncram_component|altsyncram_qto1:auto_generated|altsyncram_m5s1:altsyncram1|q_a[13] ; portadataout13   ;
; |ram|memory:inst|altsyncram:altsyncram_component|altsyncram_qto1:auto_generated|altsyncram_m5s1:altsyncram1|ram_block2a0 ; |ram|memory:inst|altsyncram:altsyncram_component|altsyncram_qto1:auto_generated|altsyncram_m5s1:altsyncram1|q_a[14] ; portadataout14   ;
; |ram|memory:inst|altsyncram:altsyncram_component|altsyncram_qto1:auto_generated|altsyncram_m5s1:altsyncram1|ram_block2a0 ; |ram|memory:inst|altsyncram:altsyncram_component|altsyncram_qto1:auto_generated|altsyncram_m5s1:altsyncram1|q_a[15] ; portadataout15   ;
; |ram|add:inst2|a[5]                                                                                                      ; |ram|add:inst2|a[5]                                                                                                 ; regout           ;
; |ram|add:inst2|a[6]                                                                                                      ; |ram|add:inst2|a[6]                                                                                                 ; regout           ;
; |ram|add:inst2|a[7]                                                                                                      ; |ram|add:inst2|a[7]                                                                                                 ; regout           ;
; |ram|add:inst2|a[6]~35                                                                                                   ; |ram|add:inst2|a[6]~42                                                                                              ; cout             ;
; |ram|add:inst2|a[7]~36                                                                                                   ; |ram|add:inst2|a[7]~36                                                                                              ; combout          ;
; |ram|inst4                                                                                                               ; |ram|inst4                                                                                                          ; combout          ;
; |ram|q[15]                                                                                                               ; |ram|q[15]                                                                                                          ; padio            ;
; |ram|q[14]                                                                                                               ; |ram|q[14]                                                                                                          ; padio            ;
; |ram|q[13]                                                                                                               ; |ram|q[13]                                                                                                          ; padio            ;
; |ram|q[12]                                                                                                               ; |ram|q[12]                                                                                                          ; padio            ;
; |ram|q[11]                                                                                                               ; |ram|q[11]                                                                                                          ; padio            ;
; |ram|q[10]                                                                                                               ; |ram|q[10]                                                                                                          ; padio            ;
; |ram|q[9]                                                                                                                ; |ram|q[9]                                                                                                           ; padio            ;
; |ram|q[8]                                                                                                                ; |ram|q[8]                                                                                                           ; padio            ;
; |ram|q[7]                                                                                                                ; |ram|q[7]                                                                                                           ; padio            ;
; |ram|q[6]                                                                                                                ; |ram|q[6]                                                                                                           ; padio            ;
; |ram|q[5]                                                                                                                ; |ram|q[5]                                                                                                           ; padio            ;
; |ram|q[4]                                                                                                                ; |ram|q[4]                                                                                                           ; padio            ;
; |ram|q[3]                                                                                                                ; |ram|q[3]                                                                                                           ; padio            ;
; |ram|q[2]                                                                                                                ; |ram|q[2]                                                                                                           ; padio            ;
; |ram|q[1]                                                                                                                ; |ram|q[1]                                                                                                           ; padio            ;
; |ram|q[0]                                                                                                                ; |ram|q[0]                                                                                                           ; padio            ;
+--------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------+------------------+


+---------------------+
; Simulator INI Usage ;
+--------+------------+
; Option ; Usage      ;
+--------+------------+


+--------------------+
; Simulator Messages ;
+--------------------+
Info: *******************************************************************
Info: Running Quartus II Simulator
    Info: Version 7.0 Build 33 02/05/2007 SJ Full Version
    Info: Processing started: Mon Apr 20 15:00:09 2009
Info: Command: quartus_sim --read_settings_files=on --write_settings_files=off ram -c ram
Info: Using vector source file "D:/Program Files/altera/test/ram/ram.vwf"
Info: Overwriting simulation input file with simulation results
    Info: A backup of ram.vwf called ram.sim_ori.vwf has been created in the db folder
Info: Option to preserve fewer signal transitions to reduce memory requirements is enabled
    Info: Simulation has been partitioned into sub-simulations according to the maximum transition count determined by the engine. Transitions from memory will be flushed out to disk at the end of each sub-simulation to reduce memory requirements.
Info: Simulation partitioned into 1 sub-simulations
Info: Simulation coverage is      53.57 %
Info: Number of transitions in simulation is 1244
Info: Vector file ram.vwf is saved in VWF text format. You can compress it into CVWF format in order to reduce file size. For more details please refer to the Quartus II Help.
Info: Quartus II Simulator was successful. 0 errors, 0 warnings
    Info: Allocated 91 megabytes of memory during processing
    Info: Processing ended: Mon Apr 20 15:00:10 2009
    Info: Elapsed time: 00:00:01