memory_inst.vhd

来自「ram的vhdl源代码在colloy实现」· VHDL 代码 · 共 10 行

memory_inst : memory PORT MAP (
		data	 => data_sig,
		rdaddress	 => rdaddress_sig,
		rdclock	 => rdclock_sig,
		wraddress	 => wraddress_sig,
		wrclock	 => wrclock_sig,
		wren	 => wren_sig,
		q	 => q_sig
	);