count__10.asm.qmsg

这是VERILOG语言编写的程序,可在FPGA板上运行.有很大的作用.谢谢.

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler Quartus II " "Info: Running Quartus II Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 6.0 Build 178 04/27/2006 SJ Web Edition " "Info: Version 6.0 Build 178 04/27/2006 SJ Web Edition" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Sun Mar 29 12:18:46 2009 " "Info: Processing started: Sun Mar 29 12:18:46 2009" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --read_settings_files=off --write_settings_files=off count__10 -c count__10 " "Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off count__10 -c count__10" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Warning" "WCPT_ASSEMBLER_DISABLED_IN_EVAL_MODE" "" "Warning: Can't generate programming files because you are currently using the Quartus II software in Evaluation Mode" {  } {  } 0 0 "Can't generate programming files because you are currently using the Quartus II software in Evaluation Mode" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 1  Quartus II " "Info: Quartus II Assembler was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_BANNER_TIME" "Sun Mar 29 12:18:46 2009 " "Info: Processing ended: Sun Mar 29 12:18:46 2009" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}