prev_cmp_clock.qmsg

用VHDL实现的完整数字钟代码

{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "CONTROL CONTROL:U1 " "Info: Elaborating entity \"CONTROL\" for hierarchy \"CONTROL:U1\"" {  } { { "clock.vhd" "U1" { Text "E:/EDA2006073071/clock/clock.vhd" 52 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "QM control.vhd(15) " "Warning (10492): VHDL Process Statement warning at control.vhd(15): signal \"QM\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" {  } { { "control.vhd" "" { Text "E:/EDA2006073071/clock/control.vhd" 15 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "QS control.vhd(16) " "Warning (10492): VHDL Process Statement warning at control.vhd(16): signal \"QS\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" {  } { { "control.vhd" "" { Text "E:/EDA2006073071/clock/control.vhd" 16 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0 0}
{ "Warning" "WVRFX_L2_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "ENH control.vhd(11) " "Warning (10631): VHDL Process Statement warning at control.vhd(11): inferring latch(es) for signal or variable \"ENH\", which holds its previous value in one or more paths through the process" {  } { { "control.vhd" "" { Text "E:/EDA2006073071/clock/control.vhd" 11 0 0 } }  } 0 10631 "VHDL Process Statement warning at %2!s!: inferring latch(es) for signal or variable \"%1!s!\", which holds its previous value in one or more paths through the process" 0 0 "" 0 0}
{ "Warning" "WVRFX_L2_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "ENM control.vhd(11) " "Warning (10631): VHDL Process Statement warning at control.vhd(11): inferring latch(es) for signal or variable \"ENM\", which holds its previous value in one or more paths through the process" {  } { { "control.vhd" "" { Text "E:/EDA2006073071/clock/control.vhd" 11 0 0 } }  } 0 10631 "VHDL Process Statement warning at %2!s!: inferring latch(es) for signal or variable \"%1!s!\", which holds its previous value in one or more paths through the process" 0 0 "" 0 0}
{ "Warning" "WVRFX_L2_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "CPH control.vhd(11) " "Warning (10631): VHDL Process Statement warning at control.vhd(11): inferring latch(es) for signal or variable \"CPH\", which holds its previous value in one or more paths through the process" {  } { { "control.vhd" "" { Text "E:/EDA2006073071/clock/control.vhd" 11 0 0 } }  } 0 10631 "VHDL Process Statement warning at %2!s!: inferring latch(es) for signal or variable \"%1!s!\", which holds its previous value in one or more paths through the process" 0 0 "" 0 0}
{ "Warning" "WVRFX_L2_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "CPM control.vhd(11) " "Warning (10631): VHDL Process Statement warning at control.vhd(11): inferring latch(es) for signal or variable \"CPM\", which holds its previous value in one or more paths through the process" {  } { { "control.vhd" "" { Text "E:/EDA2006073071/clock/control.vhd" 11 0 0 } }  } 0 10631 "VHDL Process Statement warning at %2!s!: inferring latch(es) for signal or variable \"%1!s!\", which holds its previous value in one or more paths through the process" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "CNT12_24 CNT12_24:U2 " "Info: Elaborating entity \"CNT12_24\" for hierarchy \"CNT12_24:U2\"" {  } { { "clock.vhd" "U2" { Text "E:/EDA2006073071/clock/clock.vhd" 53 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "CNT60 CNT60:U3 " "Info: Elaborating entity \"CNT60\" for hierarchy \"CNT60:U3\"" {  } { { "clock.vhd" "U3" { Text "E:/EDA2006073071/clock/clock.vhd" 54 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "LED LED:U5 " "Info: Elaborating entity \"LED\" for hierarchy \"LED:U5\"" {  } { { "clock.vhd" "U5" { Text "E:/EDA2006073071/clock/clock.vhd" 56 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "FM FM:U6 " "Info: Elaborating entity \"FM\" for hierarchy \"FM:U6\"" {  } { { "clock.vhd" "U6" { Text "E:/EDA2006073071/clock/clock.vhd" 57 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 0}
{ "Warning" "WVRFX_L2_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "QFM timer.vhd(14) " "Warning (10631): VHDL Process Statement warning at timer.vhd(14): inferring latch(es) for signal or variable \"QFM\", which holds its previous value in one or more paths through the process" {  } { { "timer.vhd" "" { Text "E:/EDA2006073071/clock/timer.vhd" 14 0 0 } }  } 0 10631 "VHDL Process Statement warning at %2!s!: inferring latch(es) for signal or variable \"%1!s!\", which holds its previous value in one or more paths through the process" 0 0 "" 0 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "QFM timer.vhd(14) " "Info (10041): Inferred latch for \"QFM\" at timer.vhd(14)" {  } { { "timer.vhd" "" { Text "E:/EDA2006073071/clock/timer.vhd" 14 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_LATCH_DISABLED" "FM:U6\|QFM " "Warning: LATCH primitive \"FM:U6\|QFM\" is permanently disabled" {  } { { "timer.vhd" "" { Text "E:/EDA2006073071/clock/timer.vhd" 10 -1 0 } }  } 0 0 "LATCH primitive \"%1!s!\" is permanently disabled" 0 0 "" 0 0}