miller.tmw_info

使用VHDL实现基带码中密勒码的编解码

start_full_compilation:s:00:00:16
start_analysis_synthesis:s:00:00:05
start_fitter:s:00:00:06
start_assembler:s:00:00:03
start_timing_analyzer:s:00:00:02
start_quartus_simulator:s:00:00:03