zxianbo.vhd

VHDL实现 SPWM 通过ADC1407转换实现变频控制和变幅控制； 通过LCD1602实现频率和调制比显示

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-- Company: 
-- Engineer: 
-- 
-- Create Date:    12:22:14 04/17/2009 
-- Design Name: 
-- Module Name:    ZXIANBO - RTL 
-- Project Name: 
-- Target Devices: 
-- Tool versions: 
-- Description: 
--
-- Dependencies: 
--
-- Revision: 
-- Revision 0.01 - File Created
-- Additional Comments: 
--
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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity ZXIANBO is
    Port ( CLK : in  STD_LOGIC;
           RESET : in  STD_LOGIC;
			  PUT_HZ: in integer range 0 to 255;
			  PUT_ff:  in integer range 0 to 255;
			  A_Adjust:out STD_LOGIC_VECTOR (7 downto 0); 
			  B_Adjust:out STD_LOGIC_VECTOR (7 downto 0); 
			  C_Adjust:out STD_LOGIC_VECTOR (7 downto 0)); 
          

end ZXIANBO;

architecture RTL of ZXIANBO is

signal A_COUNT:integer range 0 to 511;
signal B_COUNT:integer range 0 to 511;
signal C_COUNT:integer range 0 to 511;
signal count_hz:integer range 0 to 100000;
signal cha:integer range 0 to 100000;
signal SIN_CLK:STD_LOGIC;
signal A_ADDR :STD_LOGIC_VECTOR(8 downto 0);
signal B_ADDR :STD_LOGIC_VECTOR(8 downto 0);
signal C_ADDR :STD_LOGIC_VECTOR(8 downto 0);
signal ADDR :  STD_LOGIC_VECTOR (8 downto 0);
signal AAA_DATA:INTEGER RANGE 0 to 65535;
signal BBB_DATA:INTEGER RANGE 0 to 65535;
signal CCC_DATA:INTEGER RANGE 0 to 65535;
signal AA_DATA:STD_LOGIC_VECTOR(16 downto 0);
signal BB_DATA:STD_LOGIC_VECTOR(16 downto 0);
signal CC_DATA:STD_LOGIC_VECTOR(16 downto 0);
signal A_DATA:STD_LOGIC_VECTOR(7 downto 0);
signal B_DATA:STD_LOGIC_VECTOR(7 downto 0);
signal C_DATA:STD_LOGIC_VECTOR(7 downto 0);
signal flag_A:STD_LOGIC;
signal flag_B:STD_LOGIC;
signal flag_C:STD_LOGIC;
signal A_UPDN: STD_LOGIC;
signal B_UPDN: STD_LOGIC;
signal C_UPDN: STD_LOGIC;
signal UNIT_HZ:integer range 0 to 100000;
signal tzsd:INTEGER range 1 to 255; --调制深度信号，0-1。
signal MEM_DATA_SIG:INTEGER range 0 to 255; 
signal MEM_DATA:STD_LOGIC_VECTOR (8 downto 0);
signal PUT_HZ_integer:integer range 0 to 255;
begin
--根据输入的频率算出脉冲个数；
MEM_DATA_SIG <=CONV_INTEGER(MEM_DATA);
tzsd <= PUT_ff;
PUT_HZ_integer<=PUT_HZ;
UNIT_HZ<=97656;
process(PUT_HZ_integer,CLK,RESET)
begin
if RESET='0' then
count_hz<=1;
cha<=UNIT_HZ;
elsif rising_edge(CLK) then 
   if(cha>=PUT_HZ_integer) then
	  cha<=UNIT_HZ-count_hz*PUT_HZ_integer;
	  count_hz<=count_hz+1;
	  SIN_CLK<='0';
	else
	 count_hz<=1;
	 cha<=UNIT_HZ;
	 SIN_CLK<='1';
	 end if;
end if;
end process;

--产生A相地址；
process(SIN_CLK,RESET)
begin
if RESET='0' then
   A_COUNT<=1;
	A_UPDN<='1';
	flag_A<='1';
elsif rising_edge(SIN_CLK) then
		if (A_UPDN='1')  then
       A_COUNT<= A_COUNT + 1;
		 		 if A_COUNT =510 then
             A_UPDN<= not A_UPDN ;
				 end if;
		elsif(A_UPDN='0') then
		 A_COUNT<= A_COUNT - 1;
		       if A_COUNT = 1 then
             A_UPDN<= not A_UPDN ;
				 flag_A<= not flag_A;
		       end if;	
      
      end if;

end if;
A_ADDR <= conv_STD_LOGIC_VECTOR (A_COUNT,9);
end process;


--产生B相地?罚?
process(SIN_CLK,RESET)
begin
if RESET='0' then
   B_COUNT<=341;
	B_UPDN<='1';
	flag_B<='0';
elsif rising_edge(SIN_CLK) then
		if (B_UPDN='1')  then
       B_COUNT<= B_COUNT + 1;
		 		 if B_COUNT = 510 then
             B_UPDN<= not B_UPDN ;
				 end if;
		elsif(B_UPDN='0') then
		 B_COUNT<= B_COUNT - 1;
		       if B_COUNT = 1 then
             B_UPDN<= not B_UPDN ;
				 flag_B<= not flag_B;
		       end if;	
      
      end if;

end if;

B_ADDR <=conv_STD_LOGIC_VECTOR (B_COUNT,9);
end process;


--产生C相地址；
process(SIN_CLK,RESET)
begin
if RESET='0' then
   C_COUNT<=341;
	C_UPDN<='0';
	flag_C<='1';
elsif rising_edge(SIN_CLK) then
		if (C_UPDN='1')  then
       C_COUNT<= C_COUNT + 1;
		 		 if C_COUNT = 510 then
             C_UPDN<= not C_UPDN ;
				 end if;
		elsif(C_UPDN='0') then
		 C_COUNT<= C_COUNT - 1;
		       if C_COUNT = 1 then
             C_UPDN<= not C_UPDN ;
				 flag_C<= not flag_C;
		       end if;	
      
      end if;

end if;

C_ADDR <=conv_STD_LOGIC_VECTOR (C_COUNT,9);
end process;

--A,B,C相循环输出；
process(CLK,RESET)
variable m:integer range 0 to 10;
begin
if RESET='0' then
   m:=1;
elsif rising_edge(CLK) then
   case (m)  is
	when 1 =>
	ADDR <=A_ADDR;
	BBB_DATA <= tzsd * MEM_DATA_SIG;
	BB_DATA<=conv_STD_LOGIC_VECTOR (BBB_DATA,17);
	B_DATA<=BB_DATA(16 downto 9);
	m:= m + 1;
	
	when 2 =>
	ADDR<=B_ADDR;
   CCC_DATA<=tzsd * MEM_DATA_SIG;
	CC_DATA<=conv_STD_LOGIC_VECTOR (CCC_DATA,17);
	C_DATA<=CC_DATA(16 downto 9);
	m:= m + 1;
	
	when 3 =>
	ADDR<=C_ADDR;
	AAA_DATA<=tzsd * MEM_DATA_SIG;
	AA_DATA<=conv_STD_LOGIC_VECTOR (AAA_DATA,17);
	A_DATA<=AA_DATA(16 downto 9);
   m:=1;
	when others   => m:=1;
   end case;
end if;
end process;

--调整A????值；
process(CLK,flag_A)
begin
if rising_edge(CLK) then
 if flag_A='1' then
 A_Adjust<=A_DATA+"1111111";
 elsif flag_A='0' then
 A_Adjust<="1111111"-A_DATA;
 end if;
end if;
end process;

--调整B??????；
process(CLK,flag_B)
begin
if rising_edge(CLK) then
 if flag_B='1' then
 B_Adjust<=B_DATA+"1111111";
 elsif flag_B='0' then
 B_Adjust<="1111111"-B_DATA;
 end if;
end if;
end process;

--调整C????值；
process(CLK,flag_C)
begin
if rising_edge(CLK) then
 if flag_C='1' then
 C_Adjust<=C_DATA+"1111111";
 elsif flag_C='0' then
 C_Adjust<="1111111"-C_DATA;
 end if;
end if;
end process;


process(ADDR, CLK)
begin
if rising_edge(CLK) then 
case (ADDR) is
WHEN "000000000" => MEM_DATA <= "000000000";
WHEN "000000001" => MEM_DATA <= "000000001";
WHEN "000000010" => MEM_DATA <= "000000010";
WHEN "000000011" => MEM_DATA <= "000000010"; 
WHEN "000000100" => MEM_DATA <= "000000011";
WHEN "000000101" => MEM_DATA <= "000000100";
WHEN "000000110" => MEM_DATA <= "000000101";
WHEN "000000111" => MEM_DATA <= "000000101";
WHEN "000001000" => MEM_DATA <= "000000110"; 
WHEN "000001001" => MEM_DATA <= "000000111";
WHEN "000001010" => MEM_DATA <= "000001000";
WHEN "000001011" => MEM_DATA <= "000001001";
WHEN "000001100" => MEM_DATA <= "000001001";
WHEN "000001101" => MEM_DATA <= "000001010"; 
WHEN "000001110" => MEM_DATA <= "000001011";
WHEN "000001111" => MEM_DATA <= "000001100";
WHEN "000010000" => MEM_DATA <= "000001101";
WHEN "000010001" => MEM_DATA <= "000001101";
WHEN "000010010" => MEM_DATA <= "000001110"; 
WHEN "000010011" => MEM_DATA <= "000001111"; 
WHEN "000010100" => MEM_DATA <= "000010000";
WHEN "000010101" => MEM_DATA <= "000010000";
WHEN "000010110" => MEM_DATA <= "000010001";
WHEN "000010111" => MEM_DATA <= "000010010"; 
WHEN "000011000" => MEM_DATA <= "000010011";
WHEN "000011001" => MEM_DATA <= "000010100";
WHEN "000011010" => MEM_DATA <= "000010100";
WHEN "000011011" => MEM_DATA <= "000010101";
WHEN "000011100" => MEM_DATA <= "000010110"; 
WHEN "000011101" => MEM_DATA <= "000010111";
WHEN "000011110" => MEM_DATA <= "000010111";
WHEN "000011111" => MEM_DATA <= "000011000";
WHEN "000100000" => MEM_DATA <= "000011001";
WHEN "000100001" => MEM_DATA <= "000011010"; 
WHEN "000100010" => MEM_DATA <= "000011011";
WHEN "000100011" => MEM_DATA <= "000011011";
WHEN "000100100" => MEM_DATA <= "000011100";
WHEN "000100101" => MEM_DATA <= "000011101";
WHEN "000100110" => MEM_DATA <= "000011110"; 
WHEN "000100111" => MEM_DATA <= "000011110";
WHEN "000101000" => MEM_DATA <= "000011111";
WHEN "000101001" => MEM_DATA <= "000100000";
WHEN "000101010" => MEM_DATA <= "000100001";
WHEN "000101011" => MEM_DATA <= "000100010"; 
WHEN "000101100" => MEM_DATA <= "000100010";
WHEN "000101101" => MEM_DATA <= "000100011";
WHEN "000101110" => MEM_DATA <= "000100100";
WHEN "000101111" => MEM_DATA <= "000100101";
WHEN "000110000" => MEM_DATA <= "000100101"; 
WHEN "000110001" => MEM_DATA <= "000100110";
WHEN "000110010" => MEM_DATA <= "000100111";
WHEN "000110011" => MEM_DATA <= "000101000";
WHEN "000110100" => MEM_DATA <= "000101001";
WHEN "000110101" => MEM_DATA <= "000101001"; 
WHEN "000110110" => MEM_DATA <= "000101010";
WHEN "000110111" => MEM_DATA <= "000101011";
WHEN "000111000" => MEM_DATA <= "000101100";
WHEN "000111001" => MEM_DATA <= "000101100";
WHEN "000111010" => MEM_DATA <= "000101101"; 
WHEN "000111011" => MEM_DATA <= "000101110";
WHEN "000111100" => MEM_DATA <= "000101111";
WHEN "000111101" => MEM_DATA <= "000110000";
WHEN "000111110" => MEM_DATA <= "000110000";
WHEN "000111111" => MEM_DATA <= "000110001"; 
WHEN "001000000" => MEM_DATA <= "000110010";
WHEN "001000001" => MEM_DATA <= "000110011";
WHEN "001000010" => MEM_DATA <= "000110011";
WHEN "001000011" => MEM_DATA <= "000110100";
WHEN "001000100" => MEM_DATA <= "000110101"; 
WHEN "001000101" => MEM_DATA <= "000110110";
WHEN "001000110" => MEM_DATA <= "000110110";
WHEN "001000111" => MEM_DATA <= "000110111";
WHEN "001001000" => MEM_DATA <= "000111000";
WHEN "001001001" => MEM_DATA <= "000111001"; 
WHEN "001001010" => MEM_DATA <= "000111010";
WHEN "001001011" => MEM_DATA <= "000111010";
WHEN "001001100" => MEM_DATA <= "000111011";
WHEN "001001101" => MEM_DATA <= "000111100";
WHEN "001001110" => MEM_DATA <= "000111101"; 
WHEN "001001111" => MEM_DATA <= "000111101";
WHEN "001010000" => MEM_DATA <= "000111110";
WHEN "001010001" => MEM_DATA <= "000111111";
WHEN "001010010" => MEM_DATA <= "001000000";
WHEN "001010011" => MEM_DATA <= "001000000"; 
WHEN "001010100" => MEM_DATA <= "001000001";
WHEN "001010101" => MEM_DATA <= "001000010";
WHEN "001010110" => MEM_DATA <= "001000011";
WHEN "001010111" => MEM_DATA <= "001000011";
WHEN "001011000" => MEM_DATA <= "001000100"; 
WHEN "001011001" => MEM_DATA <= "001000101";
WHEN "001011010" => MEM_DATA <= "001000110";
WHEN "001011011" => MEM_DATA <= "001000110";
WHEN "001011100" => MEM_DATA <= "001000111";
WHEN "001011101" => MEM_DATA <= "001001000";
WHEN "001011110" => MEM_DATA <= "001001001";
WHEN "001011111" => MEM_DATA <= "001001001";
WHEN "001100000" => MEM_DATA <= "001001010";
WHEN "001100001" => MEM_DATA <= "001001011";
WHEN "001100010" => MEM_DATA <= "001001100"; 
WHEN "001100011" => MEM_DATA <= "001001100";
WHEN "001100100" => MEM_DATA <= "001001101";
WHEN "001100101" => MEM_DATA <= "001001110";
WHEN "001100110" => MEM_DATA <= "001001111";
WHEN "001100111" => MEM_DATA <= "001001111"; 
WHEN "001101000" => MEM_DATA <= "001010000";
WHEN "001101001" => MEM_DATA <= "001010001";
WHEN "001101010" => MEM_DATA <= "001010010";
WHEN "001101011" => MEM_DATA <= "001010010";
WHEN "001101100" => MEM_DATA <= "001010011"; 
WHEN "001101101" => MEM_DATA <= "001010100";
WHEN "001101110" => MEM_DATA <= "001010101";
WHEN "001101111" => MEM_DATA <= "001010101";
WHEN "001110000" => MEM_DATA <= "001010110";
WHEN "001110001" => MEM_DATA <= "001010111"; 
WHEN "001110010" => MEM_DATA <= "001011000";
WHEN "001110011" => MEM_DATA <= "001011000";
WHEN "001110100" => MEM_DATA <= "001011001";
WHEN "001110101" => MEM_DATA <= "001011010";
WHEN "001110110" => MEM_DATA <= "001011010"; 
WHEN "001110111" => MEM_DATA <= "001011011";
WHEN "001111000" => MEM_DATA <= "001011100";
WHEN "001111001" => MEM_DATA <= "001011101";
WHEN "001111010" => MEM_DATA <= "001011101";
WHEN "001111011" => MEM_DATA <= "001011110"; 
WHEN "001111100" => MEM_DATA <= "001011111";
WHEN "001111101" => MEM_DATA <= "001100000";
WHEN "001111110" => MEM_DATA <= "001100000";
WHEN "001111111" => MEM_DATA <= "001100001";
WHEN "010000000" => MEM_DATA <= "001100010"; 
WHEN "010000001" => MEM_DATA <= "001100010";
WHEN "010000010" => MEM_DATA <= "001100011";
WHEN "010000011" => MEM_DATA <= "001100100"; 
WHEN "010000100" => MEM_DATA <= "001100101";
WHEN "010000101" => MEM_DATA <= "001100101"; 
WHEN "010000110" => MEM_DATA <= "001100110";
WHEN "010000111" => MEM_DATA <= "001100111";
WHEN "010001000" => MEM_DATA <= "001101000";
WHEN "010001001" => MEM_DATA <= "001101000";