📄 test_inctl.v
字号:
module tinctl(); reg clk, rst; reg req_in, ack_in; wire req_out, ack_out; reg [33:0] din; wire [33:0] dout, du3; inctl cut(.clk(clk), .rst(rst), .req_in(req_in), .req_out(req_out), .ack_in(ack_in), .ack_out(ack_out), .din(din), .dout(dout), .du_3(du3)); always begin #5 clk = ~clk; end initial begin clk = 0; rst = 0; req_in = 0; ack_in = 0; #10; rst = 1; #8; rst = 0; din = 34'b1000011010001111110101100011010001; #10; req_in = 1; #8; ack_in = 1; #10; req_in = 0; din = 34'b0000000000000000000000000000000000; endendmodule
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -