lift_comtrol_main.tan.qmsg

verilog语言写的一个四层电梯程序

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Timing Analyzer Quartus II " "Info: Running Quartus II Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 6.0 Build 178 04/27/2006 SJ Full Version " "Info: Version 6.0 Build 178 04/27/2006 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Sun Sep 09 18:17:50 2007 " "Info: Processing started: Sun Sep 09 18:17:50 2007" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off Lift_comtrol_main -c Lift_comtrol_main --timing_analysis_only " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off Lift_comtrol_main -c Lift_comtrol_main --timing_analysis_only" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "clk0 " "Info: Assuming node \"clk0\" is an undefined clock" {  } { { "Lift_comtrol_main.v" "" { Text "E:/自动电梯/状态机/Lift_comtrol_main.v" 2 -1 0 } } { "d:/quartus/win/Assignment Editor.qase" "" { Assignment "d:/quartus/win/Assignment Editor.qase" 1 { { 0 "clk0" } } } }  } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0}  } {  } 0 0 "Found pins functioning as undefined clocks and/or memory enables" 0 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "clk0 register down register down 203.96 MHz 4.903 ns Internal " "Info: Clock \"clk0\" has Internal fmax of 203.96 MHz between source register \"down\" and destination register \"down\" (period= 4.903 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "4.642 ns + Longest register register " "Info: + Longest register to register delay is 4.642 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns down 1 REG LC_X13_Y10_N2 11 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X13_Y10_N2; Fanout = 11; REG Node = 'down'" {  } { { "d:/quartus/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus/win/TimingClosureFloorplan.fld" "" "" { down } "NODE_NAME" } } { "Lift_comtrol_main.v" "" { Text "E:/自动电梯/状态机/Lift_comtrol_main.v" 8 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.656 ns) + CELL(0.590 ns) 2.246 ns always10~9 2 COMB LC_X9_Y9_N2 2 " "Info: 2: + IC(1.656 ns) + CELL(0.590 ns) = 2.246 ns; Loc. = LC_X9_Y9_N2; Fanout = 2; COMB Node = 'always10~9'" {  } { { "d:/quartus/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus/win/TimingClosureFloorplan.fld" "" "2.246 ns" { down always10~9 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.550 ns) + CELL(0.114 ns) 3.910 ns down~1975 3 COMB LC_X13_Y10_N5 1 " "Info: 3: + IC(1.550 ns) + CELL(0.114 ns) = 3.910 ns; Loc. = LC_X13_Y10_N5; Fanout = 1; COMB Node = 'down~1975'" {  } { { "d:/quartus/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus/win/TimingClosureFloorplan.fld" "" "1.664 ns" { always10~9 down~1975 } "NODE_NAME" } } { "Lift_comtrol_main.v" "" { Text "E:/自动电梯/状态机/Lift_comtrol_main.v" 8 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.423 ns) + CELL(0.309 ns) 4.642 ns down 4 REG LC_X13_Y10_N2 11 " "Info: 4: + IC(0.423 ns) + CELL(0.309 ns) = 4.642 ns; Loc. = LC_X13_Y10_N2; Fanout = 11; REG Node = 'down'" {  } { { "d:/quartus/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus/win/TimingClosureFloorplan.fld" "" "0.732 ns" { down~1975 down } "NODE_NAME" } } { "Lift_comtrol_main.v" "" { Text "E:/自动电梯/状态机/Lift_comtrol_main.v" 8 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.013 ns ( 21.82 % ) " "Info: Total cell delay = 1.013 ns ( 21.82 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.629 ns ( 78.18 % ) " "Info: Total interconnect delay = 3.629 ns ( 78.18 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/quartus/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus/win/TimingClosureFloorplan.fld" "" "4.642 ns" { down always10~9 down~1975 down } "NODE_NAME" } } { "d:/quartus/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/quartus/win/Technology_Viewer.qrui" "4.642 ns" { down always10~9 down~1975 down } { 0.000ns 1.656ns 1.550ns 0.423ns } { 0.000ns 0.590ns 0.114ns 0.309ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk0 destination 2.925 ns + Shortest register " "Info: + Shortest clock path from clock \"clk0\" to destination register is 2.925 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns clk0 1 CLK PIN_29 24 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_29; Fanout = 24; CLK Node = 'clk0'" {  } { { "d:/quartus/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus/win/TimingClosureFloorplan.fld" "" "" { clk0 } "NODE_NAME" } } { "Lift_comtrol_main.v" "" { Text "E:/自动电梯/状态机/Lift_comtrol_main.v" 2 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.745 ns) + CELL(0.711 ns) 2.925 ns down 2 REG LC_X13_Y10_N2 11 " "Info: 2: + IC(0.745 ns) + CELL(0.711 ns) = 2.925 ns; Loc. = LC_X13_Y10_N2; Fanout = 11; REG Node = 'down'" {  } { { "d:/quartus/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus/win/TimingClosureFloorplan.fld" "" "1.456 ns" { clk0 down } "NODE_NAME" } } { "Lift_comtrol_main.v" "" { Text "E:/自动电梯/状态机/Lift_comtrol_main.v" 8 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns ( 74.53 % ) " "Info: Total cell delay = 2.180 ns ( 74.53 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.745 ns ( 25.47 % ) " "Info: Total interconnect delay = 0.745 ns ( 25.47 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/quartus/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus/win/TimingClosureFloorplan.fld" "" "2.925 ns" { clk0 down } "NODE_NAME" } } { "d:/quartus/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/quartus/win/Technology_Viewer.qrui" "2.925 ns" { clk0 clk0~out0 down } { 0.000ns 0.000ns 0.745ns } { 0.000ns 1.469ns 0.711ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk0 source 2.925 ns - Longest register " "Info: - Longest clock path from clock \"clk0\" to source register is 2.925 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns clk0 1 CLK PIN_29 24 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_29; Fanout = 24; CLK Node = 'clk0'" {  } { { "d:/quartus/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus/win/TimingClosureFloorplan.fld" "" "" { clk0 } "NODE_NAME" } } { "Lift_comtrol_main.v" "" { Text "E:/自动电梯/状态机/Lift_comtrol_main.v" 2 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.745 ns) + CELL(0.711 ns) 2.925 ns down 2 REG LC_X13_Y10_N2 11 " "Info: 2: + IC(0.745 ns) + CELL(0.711 ns) = 2.925 ns; Loc. = LC_X13_Y10_N2; Fanout = 11; REG Node = 'down'" {  } { { "d:/quartus/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus/win/TimingClosureFloorplan.fld" "" "1.456 ns" { clk0 down } "NODE_NAME" } } { "Lift_comtrol_main.v" "" { Text "E:/自动电梯/状态机/Lift_comtrol_main.v" 8 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns ( 74.53 % ) " "Info: Total cell delay = 2.180 ns ( 74.53 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.745 ns ( 25.47 % ) " "Info: Total interconnect delay = 0.745 ns ( 25.47 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/quartus/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus/win/TimingClosureFloorplan.fld" "" "2.925 ns" { clk0 down } "NODE_NAME" } } { "d:/quartus/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/quartus/win/Technology_Viewer.qrui" "2.925 ns" { clk0 clk0~out0 down } { 0.000ns 0.000ns 0.745ns } { 0.000ns 1.469ns 0.711ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0}  } { { "d:/quartus/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus/win/TimingClosureFloorplan.fld" "" "2.925 ns" { clk0 down } "NODE_NAME" } } { "d:/quartus/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/quartus/win/Technology_Viewer.qrui" "2.925 ns" { clk0 clk0~out0 down } { 0.000ns 0.000ns 0.745ns } { 0.000ns 1.469ns 0.711ns } } } { "d:/quartus/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus/win/TimingClosureFloorplan.fld" "" "2.925 ns" { clk0 down } "NODE_NAME" } } { "d:/quartus/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/quartus/win/Technology_Viewer.qrui" "2.925 ns" { clk0 clk0~out0 down } { 0.000ns 0.000ns 0.745ns } { 0.000ns 1.469ns 0.711ns } } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" {  } { { "Lift_comtrol_main.v" "" { Text "E:/自动电梯/状态机/Lift_comtrol_main.v" 8 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.037 ns + " "Info: + Micro setup delay of destination is 0.037 ns" {  } { { "Lift_comtrol_main.v" "" { Text "E:/自动电梯/状态机/Lift_comtrol_main.v" 8 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0}  } { { "d:/quartus/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus/win/TimingClosureFloorplan.fld" "" "4.642 ns" { down always10~9 down~1975 down } "NODE_NAME" } } { "d:/quartus/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/quartus/win/Technology_Viewer.qrui" "4.642 ns" { down always10~9 down~1975 down } { 0.000ns 1.656ns 1.550ns 0.423ns } { 0.000ns 0.590ns 0.114ns 0.309ns } } } { "d:/quartus/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus/win/TimingClosureFloorplan.fld" "" "2.925 ns" { clk0 down } "NODE_NAME" } } { "d:/quartus/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/quartus/win/Technology_Viewer.qrui" "2.925 ns" { clk0 clk0~out0 down } { 0.000ns 0.000ns 0.745ns } { 0.000ns 1.469ns 0.711ns } } } { "d:/quartus/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/quartus/win/TimingClosureFloorplan.fld" "" "2.925 ns" { clk0 down } "NODE_NAME" } } { "d:/quartus/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/quartus/win/Technology_Viewer.qrui" "2.925 ns" { clk0 clk0~out0 down } { 0.000ns 0.000ns 0.745ns } { 0.000ns 1.469ns 0.711ns } } }  } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0}