cout.tan.qmsg

verilog语言写的一个四层电梯程序

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Timing Analyzer Quartus II " "Info: Running Quartus II Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.0 Build 148 04/26/2005 SJ Full Version " "Info: Version 5.0 Build 148 04/26/2005 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Sat Sep 08 16:00:49 2007 " "Info: Processing started: Sat Sep 08 16:00:49 2007" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off cout -c cout --timing_analysis_only " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off cout -c cout --timing_analysis_only" {  } {  } 0}
{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "clk0 " "Info: Assuming node \"clk0\" is an undefined clock" {  } { { "cout.v" "" { Text "E:/自动电梯/显示模块/cout.v" 2 -1 0 } } { "d:/program files/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "clk0" } } } }  } 0}  } {  } 0}
{ "Info" "ITAN_NO_REG2REG_EXIST" "clk0 " "Info: No valid register-to-register data paths exist for clock \"clk0\"" {  } {  } 0}