top.hier_info

verilog语言写的一个四层电梯程序

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overweighted <= Lift_comtrol_main:inst.overweighted
clk0 => Lift_comtrol_main:inst.clk0
clk0 => Num_Count:inst1.clk0
clk0 => cout:inst2.clk0
In_num1 => Lift_comtrol_main:inst.In_num1
In_num2 => Lift_comtrol_main:inst.In_num2
In_num3 => Lift_comtrol_main:inst.In_num3
In_num4 => Lift_comtrol_main:inst.In_num4
Out_up1 => Lift_comtrol_main:inst.Out_up1
Out_up2 => Lift_comtrol_main:inst.Out_up2
Out_up3 => Lift_comtrol_main:inst.Out_up3
Out_down2 => Lift_comtrol_main:inst.Out_down2
Out_down3 => Lift_comtrol_main:inst.Out_down3
Out_down4 => Lift_comtrol_main:inst.Out_down4
Lock => Num_Count:inst1.Lock
Lock => Lift_comtrol_main:inst.Lock
Alarm => Num_Count:inst1.Alarm
Alarm => Lift_comtrol_main:inst.Alarm
overweight => Num_Count:inst1.overweight
overweight => Lift_comtrol_main:inst.overweight
Reset => Num_Count:inst1.Reset
Reset => Lift_comtrol_main:inst.Reset
close => Num_Count:inst1.close
open => Num_Count:inst1.open
open => Lift_comtrol_main:inst.open
num1 <= Lift_comtrol_main:inst.num1
num2 <= Lift_comtrol_main:inst.num2
num3 <= Lift_comtrol_main:inst.num3
num4 <= Lift_comtrol_main:inst.num4
up1 <= Lift_comtrol_main:inst.up1
up2 <= Lift_comtrol_main:inst.up2
up3 <= Lift_comtrol_main:inst.up3
down2 <= Lift_comtrol_main:inst.down2
down3 <= Lift_comtrol_main:inst.down3
down4 <= Lift_comtrol_main:inst.down4
openled <= Lift_comtrol_main:inst.openled
upled <= Lift_comtrol_main:inst.upled
downled <= Lift_comtrol_main:inst.downled


|top|Lift_comtrol_main:inst
clk0 => num2~reg0.CLK
clk0 => num3~reg0.CLK
clk0 => num4~reg0.CLK
clk0 => up1~reg0.CLK
clk0 => up2~reg0.CLK
clk0 => up3~reg0.CLK
clk0 => down2~reg0.CLK
clk0 => down3~reg0.CLK
clk0 => down4~reg0.CLK
clk0 => up.CLK
clk0 => down.CLK
clk0 => Start~reg0.CLK
clk0 => openled~reg0.CLK
clk0 => upled~reg0.CLK
clk0 => downled~reg0.CLK
clk0 => Now_Floor[2].CLK
clk0 => Now_Floor[1].CLK
clk0 => Now_Floor[0].CLK
clk0 => overweighted~reg0.CLK
clk0 => led1~reg0.CLK
clk0 => led2~reg0.CLK
clk0 => led3~reg0.CLK
clk0 => led4~reg0.CLK
clk0 => num1~reg0.CLK
In_num1 => num1~1.OUTPUTSELECT
In_num2 => num2~1.OUTPUTSELECT
In_num3 => num3~1.OUTPUTSELECT
In_num4 => num4~1.OUTPUTSELECT
Out_up1 => always4~0.IN1
Out_up1 => always4~1.IN1
Out_up2 => always5~3.IN1
Out_up2 => always5~4.IN1
Out_up3 => always6~0.IN1
Out_up3 => always6~1.IN1
Out_down2 => always7~0.IN1
Out_down2 => always7~1.IN1
Out_down3 => always8~0.IN1
Out_down3 => always8~1.IN1
Out_down4 => always9~0.IN1
Out_down4 => always9~1.IN1
led1 <= led1~reg0.DB_MAX_OUTPUT_PORT_TYPE
led2 <= led2~reg0.DB_MAX_OUTPUT_PORT_TYPE
led3 <= led3~reg0.DB_MAX_OUTPUT_PORT_TYPE
led4 <= led4~reg0.DB_MAX_OUTPUT_PORT_TYPE
upled <= upled~reg0.DB_MAX_OUTPUT_PORT_TYPE
downled <= downled~reg0.DB_MAX_OUTPUT_PORT_TYPE
openled <= openled~reg0.DB_MAX_OUTPUT_PORT_TYPE
Start <= Start~reg0.DB_MAX_OUTPUT_PORT_TYPE
Time2 => always12~3.IN1
Time8 => Start~3.OUTPUTSELECT
Time8 => always12~3.IN0
Time8 => always11~19.IN1
Time8 => always11~14.IN1
Time8 => always11~1.IN1
Floor_Time => always14~0.IN1
Floor_Time => always14~1.IN1
Reset => num1~2.OUTPUTSELECT
Reset => num2~2.OUTPUTSELECT
Reset => num3~2.OUTPUTSELECT
Reset => num4~2.OUTPUTSELECT
Reset => up1~4.OUTPUTSELECT
Reset => always5~0.IN1
Reset => up3~3.OUTPUTSELECT
Reset => down2~3.OUTPUTSELECT
Reset => down3~3.OUTPUTSELECT
Reset => down4~3.OUTPUTSELECT
Reset => up~11.OUTPUTSELECT
Reset => down~9.OUTPUTSELECT
Reset => Start~6.OUTPUTSELECT
Reset => openled~1.OUTPUTSELECT
Reset => always13~0.IN0
Reset => Now_Floor~9.OUTPUTSELECT
Reset => Now_Floor~10.OUTPUTSELECT
Reset => Now_Floor~11.OUTPUTSELECT
Reset => led1~0.OUTPUTSELECT
Reset => led2~0.OUTPUTSELECT
Reset => led3~0.OUTPUTSELECT
Reset => led4~0.OUTPUTSELECT
Lock => always12~0.IN0
Lock => always13~0.IN1
Alarm => always12~0.IN1
Alarm => always13~1.IN0
overweight => always12~1.IN1
overweight => always13~2.IN0
overweight => overweighted~reg0.DATAIN
overweighted <= overweighted~reg0.DB_MAX_OUTPUT_PORT_TYPE
num1 <= num1~reg0.DB_MAX_OUTPUT_PORT_TYPE
num2 <= num2~reg0.DB_MAX_OUTPUT_PORT_TYPE
num3 <= num3~reg0.DB_MAX_OUTPUT_PORT_TYPE
num4 <= num4~reg0.DB_MAX_OUTPUT_PORT_TYPE
up1 <= up1~reg0.DB_MAX_OUTPUT_PORT_TYPE
up2 <= up2~reg0.DB_MAX_OUTPUT_PORT_TYPE
up3 <= up3~reg0.DB_MAX_OUTPUT_PORT_TYPE
down2 <= down2~reg0.DB_MAX_OUTPUT_PORT_TYPE
down3 <= down3~reg0.DB_MAX_OUTPUT_PORT_TYPE
down4 <= down4~reg0.DB_MAX_OUTPUT_PORT_TYPE
open => always12~2.IN1
open => always13~3.IN0


|top|Num_Count:inst1
clk0 => count1[22].CLK
clk0 => count1[21].CLK
clk0 => count1[20].CLK
clk0 => count1[19].CLK
clk0 => count1[18].CLK
clk0 => count1[17].CLK
clk0 => count1[16].CLK
clk0 => count1[15].CLK
clk0 => count1[14].CLK
clk0 => count1[13].CLK
clk0 => count1[12].CLK
clk0 => count1[11].CLK
clk0 => count1[10].CLK
clk0 => count1[9].CLK
clk0 => count1[8].CLK
clk0 => count1[7].CLK
clk0 => count1[6].CLK
clk0 => count1[5].CLK
clk0 => count1[4].CLK
clk0 => count1[3].CLK
clk0 => count1[2].CLK
clk0 => count1[1].CLK
clk0 => count1[0].CLK
clk0 => count2[22].CLK
clk0 => count2[21].CLK
clk0 => count2[20].CLK
clk0 => count2[19].CLK
clk0 => count2[18].CLK
clk0 => count2[17].CLK
clk0 => count2[16].CLK
clk0 => count2[15].CLK
clk0 => count2[14].CLK
clk0 => count2[13].CLK
clk0 => count2[12].CLK
clk0 => count2[11].CLK
clk0 => count2[10].CLK
clk0 => count2[9].CLK
clk0 => count2[8].CLK
clk0 => count2[7].CLK
clk0 => count2[6].CLK
clk0 => count2[5].CLK
clk0 => count2[4].CLK
clk0 => count2[3].CLK
clk0 => count2[2].CLK
clk0 => count2[1].CLK
clk0 => count2[0].CLK
clk0 => time8~reg0.CLK
clk0 => time2~reg0.CLK
clk0 => Floor_Time~reg0.CLK
clk0 => count1[23].CLK
Start => always0~0.IN1
time2 <= time2~reg0.DB_MAX_OUTPUT_PORT_TYPE
time8 <= time8~reg0.DB_MAX_OUTPUT_PORT_TYPE
Floor_Time <= Floor_Time~reg0.DB_MAX_OUTPUT_PORT_TYPE
upled => always1~0.IN0
downled => always1~0.IN1
Lock => always0~4.IN0
Lock => always0~0.IN0
Lock => always1~2.IN0
Alarm => always0~4.IN1
Alarm => always0~1.IN0
Alarm => always1~3.IN0
overweight => always0~5.IN1
overweight => always0~2.IN0
overweight => always1~4.IN0
Reset => count2~46.OUTPUTSELECT
Reset => count2~47.OUTPUTSELECT
Reset => count2~48.OUTPUTSELECT
Reset => count2~49.OUTPUTSELECT
Reset => count2~50.OUTPUTSELECT
Reset => count2~51.OUTPUTSELECT
Reset => count2~52.OUTPUTSELECT
Reset => count2~53.OUTPUTSELECT
Reset => count2~54.OUTPUTSELECT
Reset => count2~55.OUTPUTSELECT
Reset => count2~56.OUTPUTSELECT
Reset => count2~57.OUTPUTSELECT
Reset => count2~58.OUTPUTSELECT
Reset => count2~59.OUTPUTSELECT
Reset => count2~60.OUTPUTSELECT
Reset => count2~61.OUTPUTSELECT
Reset => count2~62.OUTPUTSELECT
Reset => count2~63.OUTPUTSELECT
Reset => count2~64.OUTPUTSELECT
Reset => count2~65.OUTPUTSELECT
Reset => count2~66.OUTPUTSELECT
Reset => count2~67.OUTPUTSELECT
Reset => count2~68.OUTPUTSELECT
Reset => time8~2.OUTPUTSELECT
Reset => time2~reg0.ENA
close => count1~48.OUTPUTSELECT
close => count1~49.OUTPUTSELECT
close => count1~50.OUTPUTSELECT
close => count1~51.OUTPUTSELECT
close => count1~52.OUTPUTSELECT
close => count1~53.OUTPUTSELECT
close => count1~54.OUTPUTSELECT
close => count1~55.OUTPUTSELECT
close => count1~56.OUTPUTSELECT
close => count1~57.OUTPUTSELECT
close => count1~58.OUTPUTSELECT
close => count1~59.OUTPUTSELECT
close => count1~60.OUTPUTSELECT
close => count1~61.OUTPUTSELECT
close => count1~62.OUTPUTSELECT
close => count1~63.OUTPUTSELECT
close => count1~64.OUTPUTSELECT
close => count1~65.OUTPUTSELECT
close => count1~66.OUTPUTSELECT
close => count1~67.OUTPUTSELECT
close => count1~68.OUTPUTSELECT
close => count1~69.OUTPUTSELECT
close => count1~70.OUTPUTSELECT
close => count1~71.OUTPUTSELECT
close => time8~0.OUTPUTSELECT
close => time2~2.OUTPUTSELECT
open => always0~6.IN1
open => always0~3.IN0
open => always1~5.IN0


|top|cout:inst2
clk0 => dp2~reg0.CLK
clk0 => dp3~reg0.CLK
clk0 => dp4~reg0.CLK
clk0 => dp1~reg0.CLK
led1 => dp1~1.OUTPUTSELECT
led2 => dp1~0.OUTPUTSELECT
led3 => dp1~0.DATAA
led4 => ~NO_FANOUT~
dp1 <= dp1~reg0.DB_MAX_OUTPUT_PORT_TYPE
dp2 <= dp2~reg0.DB_MAX_OUTPUT_PORT_TYPE
dp3 <= dp3~reg0.DB_MAX_OUTPUT_PORT_TYPE
dp4 <= dp4~reg0.DB_MAX_OUTPUT_PORT_TYPE