top.map.summary

来自「verilog语言写的一个四层电梯程序」· SUMMARY 代码 · 共 11 行

Analysis & Synthesis Status : Successful - Sun Sep 09 18:51:59 2007
Quartus II Version : 6.0 Build 178 04/27/2006 SJ Full Version
Revision Name : top
Top-level Entity Name : top
Family : Cyclone
Total logic elements : 182
Total pins : 31
Total virtual pins : 0
Total memory bits : 0
Total PLLs : 0