📄 cnt4.map.eqn
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-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions
-- and other software and tools, and its AMPP partner logic
-- functions, and any output files any of the foregoing
-- (including device programming or simulation files), and any
-- associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License
-- Subscription Agreement, Altera MegaCore Function License
-- Agreement, or other applicable license agreement, including,
-- without limitation, that your use is for the sole purpose of
-- programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the
-- applicable agreement for further details.
--B1_dffs[0] is lpm_counter:Q_rtl_0|dffs[0]
B1_dffs[0]_reg_input = VCC;
B1_dffs[0] = TFFE(B1_dffs[0]_reg_input, GLOBAL(CLK), , , );
--B1_dffs[1] is lpm_counter:Q_rtl_0|dffs[1]
B1_dffs[1]_or_out = B1_dffs[0];
B1_dffs[1]_reg_input = B1_dffs[1]_or_out;
B1_dffs[1] = TFFE(B1_dffs[1]_reg_input, GLOBAL(CLK), , , );
--B1_dffs[2] is lpm_counter:Q_rtl_0|dffs[2]
B1_dffs[2]_p1_out = B1_dffs[0] & B1_dffs[1];
B1_dffs[2]_or_out = B1_dffs[2]_p1_out;
B1_dffs[2]_reg_input = B1_dffs[2]_or_out;
B1_dffs[2] = TFFE(B1_dffs[2]_reg_input, GLOBAL(CLK), , , );
--B1_dffs[3] is lpm_counter:Q_rtl_0|dffs[3]
B1_dffs[3]_p1_out = B1_dffs[2] & B1_dffs[0] & B1_dffs[1];
B1_dffs[3]_or_out = B1_dffs[3]_p1_out;
B1_dffs[3]_reg_input = B1_dffs[3]_or_out;
B1_dffs[3] = TFFE(B1_dffs[3]_reg_input, GLOBAL(CLK), , , );
--CLK is CLK
--operation mode is input
CLK = INPUT();
--Q[0] is Q[0]
--operation mode is output
Q[0] = OUTPUT(B1_dffs[0]);
--Q[1] is Q[1]
--operation mode is output
Q[1] = OUTPUT(B1_dffs[1]);
--Q[2] is Q[2]
--operation mode is output
Q[2] = OUTPUT(B1_dffs[2]);
--Q[3] is Q[3]
--operation mode is output
Q[3] = OUTPUT(B1_dffs[3]);
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