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📄 simple_pll_3.mdl

📁 模拟锁相环(apll)的一些simulink模型
💻 MDL
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    Block {
      BlockType		      ComplexToRealImag
      Output		      "Real and imag"
      SampleTime	      "-1"
    }
    Block {
      BlockType		      Constant
      Value		      "1"
      VectorParams1D	      on
      OutDataTypeMode	      "Inherit from 'Constant value'"
      OutDataType	      "sfix(16)"
      ConRadixGroup	      "Use specified scaling"
      OutScaling	      "2^0"
      SampleTime	      "inf"
    }
    Block {
      BlockType		      DataTypeConversion
      OutDataTypeMode	      "Inherit via back propagation"
      OutDataType	      "sfix(16)"
      OutScaling	      "2^0"
      LockScale		      off
      ConvertRealWorld	      "Real World Value (RWV)"
      RndMeth		      "Zero"
      SaturateOnIntegerOverflow	on
      SampleTime	      "-1"
    }
    Block {
      BlockType		      Demux
      Outputs		      "4"
      DisplayOption	      "none"
      BusSelectionMode	      off
    }
    Block {
      BlockType		      EnablePort
      StatesWhenEnabling      "held"
      ShowOutputPort	      off
      ZeroCross		      on
    }
    Block {
      BlockType		      FrameConversion
      OutFrame		      "Frame based"
    }
    Block {
      BlockType		      From
      IconDisplay	      "Tag"
    }
    Block {
      BlockType		      Fcn
      Expr		      "sin(u[1])"
      SampleTime	      "-1"
    }
    Block {
      BlockType		      Gain
      Gain		      "1"
      Multiplication	      "Element-wise(K.*u)"
      ParameterDataTypeMode   "Same as input"
      ParameterDataType	      "sfix(16)"
      ParameterScalingMode    "Best Precision: Matrix-wise"
      ParameterScaling	      "2^0"
      OutDataTypeMode	      "Same as input"
      OutDataType	      "sfix(16)"
      OutScaling	      "2^0"
      LockScale		      off
      RndMeth		      "Floor"
      SaturateOnIntegerOverflow	on
      SampleTime	      "-1"
    }
    Block {
      BlockType		      Goto
      IconDisplay	      "Tag"
    }
    Block {
      BlockType		      Ground
    }
    Block {
      BlockType		      InitialCondition
      Value		      "1"
      SampleTime	      "-1"
    }
    Block {
      BlockType		      Inport
      Port		      "1"
      UseBusObject	      off
      BusObject		      "BusObject"
      BusOutputAsStruct	      off
      PortDimensions	      "-1"
      SampleTime	      "-1"
      DataType		      "auto"
      OutDataType	      "sfix(16)"
      OutScaling	      "2^0"
      SignalType	      "auto"
      SamplingMode	      "auto"
      LatchByDelayingOutsideSignal off
      LatchByCopyingInsideSignal off
      Interpolate	      on
    }
    Block {
      BlockType		      Integrator
      ExternalReset	      "none"
      InitialConditionSource  "internal"
      InitialCondition	      "0"
      LimitOutput	      off
      UpperSaturationLimit    "inf"
      LowerSaturationLimit    "-inf"
      ShowSaturationPort      off
      ShowStatePort	      off
      AbsoluteTolerance	      "auto"
      IgnoreLimit	      off
      ZeroCross		      on
    }
    Block {
      BlockType		      Logic
      Operator		      "AND"
      Inputs		      "2"
      AllPortsSameDT	      on
      OutDataTypeMode	      "Logical (see Configuration Parameters: Optimiza"
"tion)"
      LogicDataType	      "uint(8)"
      SampleTime	      "-1"
    }
    Block {
      BlockType		      Math
      Operator		      "exp"
      OutputSignalType	      "auto"
      SampleTime	      "-1"
      OutDataTypeMode	      "Same as first input"
      OutDataType	      "sfix(16)"
      OutScaling	      "2^0"
      LockScale		      off
      RndMeth		      "Floor"
      SaturateOnIntegerOverflow	on
    }
    Block {
      BlockType		      "M-S-Function"
      FunctionName	      "mlfile"
    }
    Block {
      BlockType		      Mux
      Inputs		      "4"
      DisplayOption	      "none"
      UseBusObject	      off
      BusObject		      "BusObject"
      NonVirtualBus	      off
    }
    Block {
      BlockType		      Outport
      Port		      "1"
      UseBusObject	      off
      BusObject		      "BusObject"
      BusOutputAsStruct	      off
      PortDimensions	      "-1"
      SampleTime	      "-1"
      DataType		      "auto"
      OutDataType	      "sfix(16)"
      OutScaling	      "2^0"
      SignalType	      "auto"
      SamplingMode	      "auto"
      OutputWhenDisabled      "held"
      InitialOutput	      "[]"
    }
    Block {
      BlockType		      PMComponent
      SubClassName	      "unknown"
    }
    Block {
      BlockType		      PMIOPort
    }
    Block {
      BlockType		      Product
      Inputs		      "2"
      Multiplication	      "Element-wise(.*)"
      InputSameDT	      on
      OutDataTypeMode	      "Same as first input"
      OutDataType	      "sfix(16)"
      OutScaling	      "2^0"
      LockScale		      off
      RndMeth		      "Zero"
      SaturateOnIntegerOverflow	on
      SampleTime	      "-1"
    }
    Block {
      BlockType		      RealImagToComplex
      Input		      "Real and imag"
      ConstantPart	      "0"
      SampleTime	      "-1"
    }
    Block {
      BlockType		      RelationalOperator
      Operator		      ">="
      InputSameDT	      on
      LogicOutDataTypeMode    "Logical (see Configuration Parameters: Optimiza"
"tion)"
      LogicDataType	      "uint(8)"
      ZeroCross		      on
      SampleTime	      "-1"
    }
    Block {
      BlockType		      Scope
      ModelBased	      off
      TickLabels	      "OneTimeTick"
      ZoomMode		      "on"
      Grid		      "on"
      TimeRange		      "auto"
      YMin		      "-5"
      YMax		      "5"
      SaveToWorkspace	      off
      SaveName		      "ScopeData"
      LimitDataPoints	      on
      MaxDataPoints	      "5000"
      Decimation	      "1"
      SampleInput	      off
      SampleTime	      "-1"
    }
    Block {
      BlockType		      Selector
      InputType		      "Vector"
      IndexMode		      "One-based"
      ElementSrc	      "Internal"
      Elements		      "1"
      RowSrc		      "Internal"
      Rows		      "1"
      ColumnSrc		      "Internal"
      Columns		      "1"
      InputPortWidth	      "-1"
      IndexIsStartValue	      off
      OutputPortSize	      "1"
    }
    Block {
      BlockType		      "S-Function"
      FunctionName	      "system"
      SFunctionModules	      "''"
      PortCounts	      "[]"
    }
    Block {
      BlockType		      Sin
      SineType		      "Time based"
      TimeSource	      "Use simulation time"
      Amplitude		      "1"
      Bias		      "0"
      Frequency		      "1"
      Phase		      "0"
      Samples		      "10"
      Offset		      "0"
      SampleTime	      "-1"
      VectorParams1D	      on
    }
    Block {
      BlockType		      StateSpace
      A			      "1"
      B			      "1"
      C			      "1"
      D			      "1"
      X0		      "0"
      AbsoluteTolerance	      "auto"
      Realization	      "auto"
    }
    Block {
      BlockType		      SubSystem
      ShowPortLabels	      on
      Permissions	      "ReadWrite"
      PermitHierarchicalResolution "All"
      SystemSampleTime	      "-1"
      RTWFcnNameOpts	      "Auto"
      RTWFileNameOpts	      "Auto"
      SimViewingDevice	      off
      DataTypeOverride	      "UseLocalSettings"
      MinMaxOverflowLogging   "UseLocalSettings"
    }
    Block {
      BlockType		      Sum
      IconShape		      "rectangular"
      Inputs		      "++"
      InputSameDT	      on
      OutDataTypeMode	      "Same as first input"
      OutDataType	      "sfix(16)"
      OutScaling	      "2^0"
      LockScale		      off
      RndMeth		      "Floor"
      SaturateOnIntegerOverflow	on
      SampleTime	      "-1"
    }
    Block {
      BlockType		      Switch
      Criteria		      "u2 >= Threshold"
      Threshold		      "0"
      InputSameDT	      on
      OutDataTypeMode	      "Inherit via internal rule"
      RndMeth		      "Floor"
      SaturateOnIntegerOverflow	on
      ZeroCross		      on
      SampleTime	      "-1"
    }
    Block {
      BlockType		      Terminator
    }
    Block {
      BlockType		      TransferFcn
      Numerator		      "[1]"
      Denominator	      "[1 2 1]"
      AbsoluteTolerance	      "auto"
      Realization	      "auto"
    }
    Block {
      BlockType		      TransportDelay
      DelayTime		      "1"
      InitialOutput	      "0"
      BufferSize	      "1024"
      FixedBuffer	      off
      TransDelayFeedthrough   off
      PadeOrder		      "0"
    }
    Block {
      BlockType		      TriggerPort
      TriggerType	      "rising"
      StatesWhenEnabling      "inherit"
      ShowOutputPort	      off
      OutputDataType	      "auto"
      SampleTimeType	      "triggered"
      SampleTime	      "1"
      ZeroCross		      on
    }
    Block {
      BlockType		      UnitDelay
      X0		      "0"
      SampleTime	      "1"
      StateMustResolveToSignalObject off
      RTWStateStorageClass    "Auto"
    }
    Block {
      BlockType		      ZeroOrderHold
      SampleTime	      "1"
    }
  }
  AnnotationDefaults {
    HorizontalAlignment	    "center"
    VerticalAlignment	    "middle"
    ForegroundColor	    "black"
    BackgroundColor	    "white"
    DropShadow		    off
    FontName		    "Helvetica"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
  }
  LineDefaults {
    FontName		    "Helvetica"
    FontSize		    9
    FontWeight		    "normal"
    FontAngle		    "normal"
  }
  System {
    Name		    "simple_pll_3"
    Location		    [2, 93, 1430, 846]
    Open		    on
    ModelBrowserVisibility  off
    ModelBrowserWidth	    200
    ScreenColor		    "white"
    PaperOrientation	    "landscape"
    PaperPositionMode	    "auto"
    PaperType		    "usletter"
    PaperUnits		    "inches"
    ZoomFactor		    "155"
    ReportName		    "simulink-default.rpt"
    Block {
      BlockType		      Reference
      Name		      "1.59e-10 F"
      Ports		      [0, 0, 0, 0, 0, 1, 1]
      Position		      [578, 205, 602, 260]
      Orientation	      "up"
      NamePlacement	      "alternate"
      ShowName		      off
      SourceBlock	      "powerlib/Elements/Series RLC Branch"
      SourceType	      "Series RLC Branch"
      PhysicalDomain	      "powersysdomain"
      SubClassName	      "unknown"
      LeftPortType	      "p1"
      RightPortType	      "p1"
      LConnTagsString	      "__new0"
      RConnTagsString	      "__new0"
      BranchType	      "RC"
      Resistance	      "47"
      Inductance	      "[]"
      SetiL0		      off
      InitialCurrent	      "0"
      Capacitance	      "150e-12"
      Setx0		      off
      InitialVoltage	      "0"
      Measurements	      "None"
    }
    Block {
      BlockType		      Reference
      Name		      "1.59e-10 F1"
      Ports		      [0, 0, 0, 0, 0, 1, 1]
      Position		      [639, 210, 661, 240]
      Orientation	      "up"
      NamePlacement	      "alternate"
      ShowName		      off
      SourceBlock	      "powerlib/Elements/Series RLC Branch"
      SourceType	      "Series RLC Branch"
      PhysicalDomain	      "powersysdomain"
      SubClassName	      "unknown"
      LeftPortType	      "p1"
      RightPortType	      "p1"
      LConnTagsString	      "__new0"
      RConnTagsString	      "__new0"
      BranchType	      "C"
      Resistance	      "[]"
      Inductance	      "[]"
      SetiL0		      off
      InitialCurrent	      "0"
      Capacitance	      "47e-12"
      Setx0		      off
      InitialVoltage	      "0"
      Measurements	      "None"
    }
    Block {
      BlockType		      Reference
      Name		      "1e3 ohm3"
      Ports		      [0, 0, 0, 0, 0, 1, 1]
      Position		      [505, 164, 560, 186]
      NamePlacement	      "alternate"
      ShowName		      off
      SourceBlock	      "powerlib/Elements/Series RLC Branch"
      SourceType	      "Series RLC Branch"
      PhysicalDomain	      "powersysdomain"
      SubClassName	      "unknown"
      LeftPortType	      "p1"
      RightPortType	      "p1"
      LConnTagsString	      "__new0"
      RConnTagsString	      "__new0"
      BranchType	      "R"
      Resistance	      "270"
      Inductance	      "[]"
      SetiL0		      off
      InitialCurrent	      "0"
      Capacitance	      "[]"
      Setx0		      off
      InitialVoltage	      "0"
      Measurements	      "None"
    }
    Block {
      BlockType		      TransferFcn
      Name		      "40 MHz Elliptic "
      Position		      [810, 167, 870, 203]
      Numerator		      "a"
      Denominator	      "b"
    }
    Block {
      BlockType		      Constant
      Name		      "8*100=800 MHz\n"
      Position		      [375, 383, 410, 417]
      Orientation	      "left"
      Value		      "8"
    }
    Block {
      BlockType		      Reference
      Name		      "D Flip-Flop"
      Ports		      [3, 2]
      Position		      [185, 192, 230, 268]
      SourceBlock	      "simulink_extras/Flip Flops/D Flip-Flop"
      SourceType	      "DFlipFlop"
      ShowPortLabels	      on
    }
    Block {
      BlockType		      Reference
      Name		      "D Flip-Flop1"

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