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📄 c54x.mht

📁 TI 的TMS320C54X的DSP的芯片软核verilog源代码
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                <TD vAlign=3Dtop>
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                  =
href=3D"http://www.opencores.org/people?request=3Dform">Get=20
                  account</A></TD></TR></TBODY></TABLE>
            <P><B>OpenIPCore</B>=20
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                  target=3D_top>Problems</A></TD></TR></TBODY></TABLE>
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                  target=3D_top>Protection</A></TD></TR></TBODY></TABLE>
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                  map</A></TD></TR></TBODY></TABLE>
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              <TR>
                <TD vAlign=3Dtop>
                  <LI></LI></TD>
                <TD><A =
href=3D"http://193.189.173.98/OIPC/flow.shtml">Design=20
                  flow</A></TD></TR></TBODY></TABLE>
            <P>
            <P><BR>
            <P><BR></P></TD>
          <TD width=3D10>&nbsp;</TD></TR></TBODY></TABLE></TD>
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alt=3D""=20
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      <TABLE cellSpacing=3D0 cellPadding=3D5 width=3D"100%" border=3D0 =
Valign=3D"TOP">
        <TBODY>
        <TR>
          <TD width=3D10>&nbsp;</TD>
          <TD vAlign=3Dtop width=3D"100%"><!-- BODY -->
            <TABLE cellSpacing=3D0 cellPadding=3D4 width=3D"100%" =
bgColor=3D#f0f0f0=20
            border=3D0>
              <TBODY>
              <TR>
                <TD align=3Dright>Overview | <A=20
                  =
href=3D"http://193.189.173.98/projects/oc54x/Wishlist">Wishlist</A>=20
                </TD></TR></TBODY></TABLE>
            <P><B><FONT color=3D#bf0000 size=3D+2>Project: OpenCores54x=20
            DSP</FONT></B>
            <P><B><FONT size=3D+1>Details</FONT></B>=20
            <P>Category: <A=20
            =
href=3D"http://193.189.173.98/projects?category=3Dmicroprocessor">Micropr=
ocessor</A><BR>Last=20
            updated: 10/4/2002<BR>Created: 8/4/2002<BR>Wishbone =
compliant core:=20
            Yes<BR>Stage: Beta<BR>Mailing list: <A=20
            href=3D"http://193.189.173.98/forums/cores">Cores</A>
            <P><B><FONT size=3D+1>Description</FONT></B>=20
            <P>The OpenCores54x (OC54x) DSP core is a cleanroom =
implementation=20
            of a popular family of DSPs designed by the No.1 DSP =
supplier from=20
            the southern part of the US. <BR><BR>The core is designed to =
be=20
            software compliant with the original Texas Instruments C54x =
DSP.=20
            However, the core is not designed to be 100% compatible with =
the=20
            TI's C54x chips. The core features some extension and =
improvements=20
            over the original design, which make it not-compatible. =
Also,=20
            partially caused by the structure choosen, partially to not=20
            completely compete with TI, some operating modes and hence =
opcodes=20
            are not supported. See the compatibility section for more =
detailes.=20
            <BR>
            <P><B><FONT size=3D+1>Features</FONT></B>=20
            <P>
            <UL>
              <LI>16/32, dual-16 bit DSP core=20
              <LI>4 Wishbone compliant external busses=20
              <LI>highly pipelined for high performance=20
              <LI>Up to 5 operations per cycle=20
              <LI>structural &amp; opcode compatible with TI's C54x =
family of=20
              DSPs=20
              <LI>First synthesis results: &gt;40MHz in FPGA, &gt;300MHz =
in .18u=20
              </LI></UL>
            <P><B><FONT size=3D+1>Status</FONT></B>=20
            <P>Finished: <BR>
            <UL>
              <LI>CPU=20
              <LI>ALU=20
              <LI>MAC=20
              <LI>Barrel Shifter=20
              <LI>Compare Select Store Unit (CSSU)=20
              <LI>Auxiliary Register Arithmetic Unit (ARAU) =
</LI></UL>ToDo: <BR>
            <UL>
              <LI>Data Address Generator=20
              <LI>Program Address Generator=20
              <LI>Instruction Decoder </LI></UL>
            <P><B><FONT size=3D+1>Tools</FONT></B>=20
            <P>
            <UL>
              <LI>Texas Instruments C54x Code Composer Studio or C54x=20
              compiler/assembler/linker=20
              <LI>GCC (GNU binutils 2.11 and later). Use tic54x as the =
target=20
              (--target=3Dtic54x)</LI></UL>
            <P><B><FONT size=3D+1>Compatibility</FONT></B>=20
            <P>Listed below are known issues between this implementation =
and=20
            Texas Instruments C54x DSPs. <BR><BR>
            <UL>
              <LI>CMPT is not supported. </LI></UL>The compatibility bit =
is not=20
            supported. As a result ARP is always set to zero.=20
            <UL>
              <LI>EDB is 32bits wide, </LI></UL>The EB data bus is =
32bits wide to=20
            support single cycle 32bit write accesses. Long words are =
always=20
            written in 1 cycle. In contrast to the C54x there's no =
difference=20
            between even and odd word addresses. The MSB is always =
written at=20
            the higher address.
            <P><B><FONT size=3D+1>Project news</FONT></B>=20
            <P>
            <TABLE cellSpacing=3D0 cellPadding=3D0 width=3D"100%" =
bgColor=3D#000000=20
            border=3D0>
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                <TD>
                  <TABLE cellSpacing=3D1 cellPadding=3D3 width=3D"100%" =
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                    <TBODY>
                    <TR bgColor=3D#c0e0ff>
                      <TD vAlign=3Dtop><B>Date</B></TD>
                      <TD vAlign=3Dtop><B>News</B></TD></TR>
                    <TR bgColor=3D#ffffff>
                      <TD vAlign=3Dtop>10/4/2002</TD>
                      <TD vAlign=3Dtop>CPU design uploaded to =
CVS<BR></TD></TR>
                    <TR bgColor=3D#f0f0f0>
                      <TD vAlign=3Dtop>8/4/2002</TD>
                      <TD vAlign=3Dtop>Project=20
              =
started<BR></TD></TR></TBODY></TABLE></TD></TR></TBODY></TABLE>
            <P><B><FONT size=3D+1>Maintainers</FONT></B>=20
            <P>
            <UL>
              <LI><A =
href=3D"http://193.189.173.98/people/rherveille">Richard=20
              Herveille</A></LI></UL>
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            height=3D1 src=3D"http://193.189.173.98/images/dotty.gif" =
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            height=3D1 src=3D"http://193.189.173.98/images/dotty.gif" =
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            height=3D1 src=3D"http://193.189.173.98/images/dotty.gif" =
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            height=3D1 src=3D"http://193.189.173.98/images/dotty.gif" =
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width=3D30>=20
            <P><BR></P></TD>
          <TD width=3D10>&nbsp;</TD></TR></TBODY></TABLE></TD></TR>
  <TR>
    <TD vAlign=3Dtop width=3D150 bgColor=3D#f0f0f0>
      <CENTER>
      <TABLE cellSpacing=3D0 cellPadding=3D6 border=3D0>
        <TBODY>
        <TR>
          <TD><A=20
            =
href=3D"http://193.189.173.98/forums/post?to=3D1b5dbe2b2026ae49ee163366fa=
e4d693">webmaster</A></TD></TR></TBODY></TABLE></CENTER></TD>
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alt=3D""=20
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    <TD vAlign=3Dtop align=3Dright bgColor=3D#ffffff>&nbsp; =
</TD></TR></TBODY></TABLE>
<TABLE cellSpacing=3D0 cellPadding=3D0 width=3D"100%" border=3D0 =
Valign=3D"TOP">
  <TBODY>
  <TR>
    <TD bgColor=3D#000000 height=3D1><IMG height=3D1 alt=3D""=20
      src=3D"http://193.189.173.98/images/dotty.gif" =
width=3D1></TD></TR>
  <TR>
    <TD>
      <CENTER>
      <TABLE cellSpacing=3D0 cellPadding=3D4 border=3D0>
        <TBODY>
        <TR>
          <TD>
            <CENTER>Administrative contact: <A=20
            =
href=3D"http://www.opencores.org/forums/post?to=3D2ee116c5a2d2e9ecceb4351=
ce864dc7b">http://www.opencores.org/forums/post?to=3D2ee116c5a2d2e9ecceb4=
351ce864dc7b</A></CENTER></TD></TR>
        <TR>
          <TD>Copyright ?999-2003 OPENCORES.ORG. All rights=20
        =
reserved.</TD></TR></TBODY></TABLE></CENTER></TD></TR></TBODY></TABLE></B=
ODY></HTML>

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