hailong.mif

采用FPGA控制LCD。程序中用了两个状态机

-- Copyright (C) 1991-2007 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files from any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.

-- Quartus II generated Memory Initialization File (.mif)

WIDTH=8;
DEPTH=64;

ADDRESS_RADIX=UNS;
DATA_RADIX=UNS;

CONTENT BEGIN
	0   :   33;
	[1..2]  :   17;
	3   :   2;
	4   :   151;
	[5..6]  :   82;
	7   :   18;
	8   :   47;
	9   :   34;
	10  :   226;
	11  :   34;
	12  :   35;
	[13..15]  :   32;
	[16..17]  :   0;
	18  :   254;
	19  :   0;
	20  :   248;
	21  :   136;
	22  :   72;
	23  :   8;
	24  :   254;
	25  :   136;
	26  :   72;
	27  :   8;
	28  :   254;
	29  :   8;
	30  :   40;
	31  :   16;
	[32..35]  :   2;
	36  :   127;
	[37..39]  :   2;
	[40..41]  :   4;
	42  :   8;
	43  :   9;
	44  :   18;
	45  :   32;
	46  :   64;
	[47..48]  :   0;
	49  :   64;
	[50..51]  :   32;
	52  :   254;
	53  :   128;
	[54..55]  :   144;
	56  :   160;
	57  :   192;
	[58..59]  :   128;
	[60..61]  :   130;
	62  :   126;
	63  :   0;
END;