ctl_lcd.map.summary

采用FPGA控制LCD。程序中用了两个状态机

Analysis & Synthesis Status : Successful - Mon Aug 04 13:54:12 2008
Quartus II Version : 7.2 Build 151 09/26/2007 SJ Full Version
Revision Name : Ctl_LCD
Top-level Entity Name : Ctl_LCD
Family : Cyclone
Total logic elements : 572
Total pins : 14
Total virtual pins : 0
Total memory bits : 512
DSP block 9-bit elements : 0
Total PLLs : 0
Total DLLs : 0