fenpin.fit.eqn

分频器 8分频器 50 已经测试 可以用 代码可更改

--tmp[0] is tmp[0] at LC1
tmp[0]_reg_input = VCC;
tmp[0] = TFFE(tmp[0]_reg_input, GLOBAL(clk), GLOBAL(clr), , );


--tmp[1] is tmp[1] at LC2
tmp[1]_or_out = tmp[0];
tmp[1]_reg_input = tmp[1]_or_out;
tmp[1] = TFFE(tmp[1]_reg_input, GLOBAL(clk), GLOBAL(clr), , );


--tmp[2] is tmp[2] at LC4
tmp[2]_p1_out = tmp[1] & tmp[0];
tmp[2]_or_out = tmp[2]_p1_out;
tmp[2]_reg_input = tmp[2]_or_out;
tmp[2] = TFFE(tmp[2]_reg_input, GLOBAL(clk), GLOBAL(clr), , );


--A1L3Q is clout~reg0 at LC3
A1L3Q_or_out = tmp[2];
A1L3Q_reg_input = A1L3Q_or_out;
A1L3Q = DFFE(A1L3Q_reg_input, GLOBAL(clk), , , clr);


--clk is clk at PIN_83
--operation mode is input

clk = INPUT();


--clr is clr at PIN_1
--operation mode is input

clr = INPUT();


--clout is clout at PIN_12
--operation mode is output

clout = OUTPUT(A1L3Q);