prev_cmp_graycounter.tan.qmsg
来自「TI公司的TLC5510的用VHDL写的控制器及其仿真」· QMSG 代码 · 共 10 行 · 第 1/4 页
QMSG
10 行
{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "clk " "Info: Assuming node \"clk\" is an undefined clock" { } { { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 14 -1 0 } } { "g:/altera/quartus/bin/Assignment Editor.qase" "" { Assignment "g:/altera/quartus/bin/Assignment Editor.qase" 1 { { 0 "clk" } } } } } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0 "" 0} } { } 0 0 "Found pins functioning as undefined clocks and/or memory enables" 0 0 "" 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "clk register BinaryCount\[0\] register BinaryCount\[12\] 337.72 MHz 2.961 ns Internal " "Info: Clock \"clk\" has Internal fmax of 337.72 MHz between source register \"BinaryCount\[0\]\" and destination register \"BinaryCount\[12\]\" (period= 2.961 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "2.697 ns + Longest register register " "Info: + Longest register to register delay is 2.697 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns BinaryCount\[0\] 1 REG LCFF_X31_Y15_N1 3 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X31_Y15_N1; Fanout = 3; REG Node = 'BinaryCount\[0\]'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "" { BinaryCount[0] } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 22 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.437 ns) + CELL(0.596 ns) 1.033 ns BinaryCount\[0\]~144 2 COMB LCCOMB_X31_Y15_N0 2 " "Info: 2: + IC(0.437 ns) + CELL(0.596 ns) = 1.033 ns; Loc. = LCCOMB_X31_Y15_N0; Fanout = 2; COMB Node = 'BinaryCount\[0\]~144'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "1.033 ns" { BinaryCount[0] BinaryCount[0]~144 } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 22 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 1.119 ns BinaryCount\[1\]~146 3 COMB LCCOMB_X31_Y15_N2 2 " "Info: 3: + IC(0.000 ns) + CELL(0.086 ns) = 1.119 ns; Loc. = LCCOMB_X31_Y15_N2; Fanout = 2; COMB Node = 'BinaryCount\[1\]~146'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { BinaryCount[0]~144 BinaryCount[1]~146 } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 22 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 1.205 ns BinaryCount\[2\]~148 4 COMB LCCOMB_X31_Y15_N4 2 " "Info: 4: + IC(0.000 ns) + CELL(0.086 ns) = 1.205 ns; Loc. = LCCOMB_X31_Y15_N4; Fanout = 2; COMB Node = 'BinaryCount\[2\]~148'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { BinaryCount[1]~146 BinaryCount[2]~148 } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 22 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 1.291 ns BinaryCount\[3\]~150 5 COMB LCCOMB_X31_Y15_N6 2 " "Info: 5: + IC(0.000 ns) + CELL(0.086 ns) = 1.291 ns; Loc. = LCCOMB_X31_Y15_N6; Fanout = 2; COMB Node = 'BinaryCount\[3\]~150'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { BinaryCount[2]~148 BinaryCount[3]~150 } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 22 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 1.377 ns BinaryCount\[4\]~152 6 COMB LCCOMB_X31_Y15_N8 2 " "Info: 6: + IC(0.000 ns) + CELL(0.086 ns) = 1.377 ns; Loc. = LCCOMB_X31_Y15_N8; Fanout = 2; COMB Node = 'BinaryCount\[4\]~152'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { BinaryCount[3]~150 BinaryCount[4]~152 } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 22 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 1.463 ns BinaryCount\[5\]~154 7 COMB LCCOMB_X31_Y15_N10 2 " "Info: 7: + IC(0.000 ns) + CELL(0.086 ns) = 1.463 ns; Loc. = LCCOMB_X31_Y15_N10; Fanout = 2; COMB Node = 'BinaryCount\[5\]~154'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { BinaryCount[4]~152 BinaryCount[5]~154 } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 22 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 1.549 ns BinaryCount\[6\]~156 8 COMB LCCOMB_X31_Y15_N12 2 " "Info: 8: + IC(0.000 ns) + CELL(0.086 ns) = 1.549 ns; Loc. = LCCOMB_X31_Y15_N12; Fanout = 2; COMB Node = 'BinaryCount\[6\]~156'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { BinaryCount[5]~154 BinaryCount[6]~156 } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 22 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.190 ns) 1.739 ns BinaryCount\[7\]~158 9 COMB LCCOMB_X31_Y15_N14 2 " "Info: 9: + IC(0.000 ns) + CELL(0.190 ns) = 1.739 ns; Loc. = LCCOMB_X31_Y15_N14; Fanout = 2; COMB Node = 'BinaryCount\[7\]~158'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "0.190 ns" { BinaryCount[6]~156 BinaryCount[7]~158 } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 22 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 1.825 ns BinaryCount\[8\]~160 10 COMB LCCOMB_X31_Y15_N16 2 " "Info: 10: + IC(0.000 ns) + CELL(0.086 ns) = 1.825 ns; Loc. = LCCOMB_X31_Y15_N16; Fanout = 2; COMB Node = 'BinaryCount\[8\]~160'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { BinaryCount[7]~158 BinaryCount[8]~160 } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 22 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 1.911 ns BinaryCount\[9\]~162 11 COMB LCCOMB_X31_Y15_N18 2 " "Info: 11: + IC(0.000 ns) + CELL(0.086 ns) = 1.911 ns; Loc. = LCCOMB_X31_Y15_N18; Fanout = 2; COMB Node = 'BinaryCount\[9\]~162'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { BinaryCount[8]~160 BinaryCount[9]~162 } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 22 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 1.997 ns BinaryCount\[10\]~164 12 COMB LCCOMB_X31_Y15_N20 2 " "Info: 12: + IC(0.000 ns) + CELL(0.086 ns) = 1.997 ns; Loc. = LCCOMB_X31_Y15_N20; Fanout = 2; COMB Node = 'BinaryCount\[10\]~164'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { BinaryCount[9]~162 BinaryCount[10]~164 } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 22 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 2.083 ns BinaryCount\[11\]~166 13 COMB LCCOMB_X31_Y15_N22 1 " "Info: 13: + IC(0.000 ns) + CELL(0.086 ns) = 2.083 ns; Loc. = LCCOMB_X31_Y15_N22; Fanout = 1; COMB Node = 'BinaryCount\[11\]~166'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { BinaryCount[10]~164 BinaryCount[11]~166 } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 22 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.506 ns) 2.589 ns BinaryCount\[12\]~167 14 COMB LCCOMB_X31_Y15_N24 1 " "Info: 14: + IC(0.000 ns) + CELL(0.506 ns) = 2.589 ns; Loc. = LCCOMB_X31_Y15_N24; Fanout = 1; COMB Node = 'BinaryCount\[12\]~167'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "0.506 ns" { BinaryCount[11]~166 BinaryCount[12]~167 } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 22 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.108 ns) 2.697 ns BinaryCount\[12\] 15 REG LCFF_X31_Y15_N25 3 " "Info: 15: + IC(0.000 ns) + CELL(0.108 ns) = 2.697 ns; Loc. = LCFF_X31_Y15_N25; Fanout = 3; REG Node = 'BinaryCount\[12\]'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "0.108 ns" { BinaryCount[12]~167 BinaryCount[12] } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 22 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.260 ns ( 83.80 % ) " "Info: Total cell delay = 2.260 ns ( 83.80 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.437 ns ( 16.20 % ) " "Info: Total interconnect delay = 0.437 ns ( 16.20 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0} } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "2.697 ns" { BinaryCount[0] BinaryCount[0]~144 BinaryCount[1]~146 BinaryCount[2]~148 BinaryCount[3]~150 BinaryCount[4]~152 BinaryCount[5]~154 BinaryCount[6]~156 BinaryCount[7]~158 BinaryCount[8]~160 BinaryCount[9]~162 BinaryCount[10]~164 BinaryCount[11]~166 BinaryCount[12]~167 BinaryCount[12] } "NODE_NAME" } } { "g:/altera/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "g:/altera/quartus/bin/Technology_Viewer.qrui" "2.697 ns" { BinaryCount[0] {} BinaryCount[0]~144 {} BinaryCount[1]~146 {} BinaryCount[2]~148 {} BinaryCount[3]~150 {} BinaryCount[4]~152 {} BinaryCount[5]~154 {} BinaryCount[6]~156 {} BinaryCount[7]~158 {} BinaryCount[8]~160 {} BinaryCount[9]~162 {} BinaryCount[10]~164 {} BinaryCount[11]~166 {} BinaryCount[12]~167 {} BinaryCount[12] {} } { 0.000ns 0.437ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns } { 0.000ns 0.596ns 0.086ns 0.086ns 0.086ns 0.086ns 0.086ns 0.086ns 0.190ns 0.086ns 0.086ns 0.086ns 0.086ns 0.506ns 0.108ns } "" } } } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 2.819 ns + Shortest register " "Info: + Shortest clock path from clock \"clk\" to destination register is 2.819 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.090 ns) 1.090 ns clk 1 CLK PIN_17 1 " "Info: 1: + IC(0.000 ns) + CELL(1.090 ns) = 1.090 ns; Loc. = PIN_17; Fanout = 1; CLK Node = 'clk'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 14 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.139 ns) + CELL(0.000 ns) 1.229 ns clk~clkctrl 2 COMB CLKCTRL_G2 26 " "Info: 2: + IC(0.139 ns) + CELL(0.000 ns) = 1.229 ns; Loc. = CLKCTRL_G2; Fanout = 26; COMB Node = 'clk~clkctrl'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "0.139 ns" { clk clk~clkctrl } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 14 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.924 ns) + CELL(0.666 ns) 2.819 ns BinaryCount\[12\] 3 REG LCFF_X31_Y15_N25 3 " "Info: 3: + IC(0.924 ns) + CELL(0.666 ns) = 2.819 ns; Loc. = LCFF_X31_Y15_N25; Fanout = 3; REG Node = 'BinaryCount\[12\]'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "1.590 ns" { clk~clkctrl BinaryCount[12] } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 22 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.756 ns ( 62.29 % ) " "Info: Total cell delay = 1.756 ns ( 62.29 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.063 ns ( 37.71 % ) " "Info: Total interconnect delay = 1.063 ns ( 37.71 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0} } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "2.819 ns" { clk clk~clkctrl BinaryCount[12] } "NODE_NAME" } } { "g:/altera/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "g:/altera/quartus/bin/Technology_Viewer.qrui" "2.819 ns" { clk {} clk~combout {} clk~clkctrl {} BinaryCount[12] {} } { 0.000ns 0.000ns 0.139ns 0.924ns } { 0.000ns 1.090ns 0.000ns 0.666ns } "" } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 2.819 ns - Longest register " "Info: - Longest clock path from clock \"clk\" to source register is 2.819 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.090 ns) 1.090 ns clk 1 CLK PIN_17 1 " "Info: 1: + IC(0.000 ns) + CELL(1.090 ns) = 1.090 ns; Loc. = PIN_17; Fanout = 1; CLK Node = 'clk'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 14 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.139 ns) + CELL(0.000 ns) 1.229 ns clk~clkctrl 2 COMB CLKCTRL_G2 26 " "Info: 2: + IC(0.139 ns) + CELL(0.000 ns) = 1.229 ns; Loc. = CLKCTRL_G2; Fanout = 26; COMB Node = 'clk~clkctrl'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "0.139 ns" { clk clk~clkctrl } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 14 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.924 ns) + CELL(0.666 ns) 2.819 ns BinaryCount\[0\] 3 REG LCFF_X31_Y15_N1 3 " "Info: 3: + IC(0.924 ns) + CELL(0.666 ns) = 2.819 ns; Loc. = LCFF_X31_Y15_N1; Fanout = 3; REG Node = 'BinaryCount\[0\]'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "1.590 ns" { clk~clkctrl BinaryCount[0] } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 22 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.756 ns ( 62.29 % ) " "Info: Total cell delay = 1.756 ns ( 62.29 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.063 ns ( 37.71 % ) " "Info: Total interconnect delay = 1.063 ns ( 37.71 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0} } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "2.819 ns" { clk clk~clkctrl BinaryCount[0] } "NODE_NAME" } } { "g:/altera/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "g:/altera/quartus/bin/Technology_Viewer.qrui" "2.819 ns" { clk {} clk~combout {} clk~clkctrl {} BinaryCount[0] {} } { 0.000ns 0.000ns 0.139ns 0.924ns } { 0.000ns 1.090ns 0.000ns 0.666ns } "" } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0} } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "2.819 ns" { clk clk~clkctrl BinaryCount[12] } "NODE_NAME" } } { "g:/altera/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "g:/altera/quartus/bin/Technology_Viewer.qrui" "2.819 ns" { clk {} clk~combout {} clk~clkctrl {} BinaryCount[12] {} } { 0.000ns 0.000ns 0.139ns 0.924ns } { 0.000ns 1.090ns 0.000ns 0.666ns } "" } } { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "2.819 ns" { clk clk~clkctrl BinaryCount[0] } "NODE_NAME" } } { "g:/altera/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "g:/altera/quartus/bin/Technology_Viewer.qrui" "2.819 ns" { clk {} clk~combout {} clk~clkctrl {} BinaryCount[0] {} } { 0.000ns 0.000ns 0.139ns 0.924ns } { 0.000ns 1.090ns 0.000ns 0.666ns } "" } } } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.304 ns + " "Info: + Micro clock to output delay of source is 0.304 ns" { } { { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 22 -1 0 } } } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TSU_DELAY" "-0.040 ns + " "Info: + Micro setup delay of destination is -0.040 ns" { } { { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 22 -1 0 } } } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0 "" 0} } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "2.697 ns" { BinaryCount[0] BinaryCount[0]~144 BinaryCount[1]~146 BinaryCount[2]~148 BinaryCount[3]~150 BinaryCount[4]~152 BinaryCount[5]~154 BinaryCount[6]~156 BinaryCount[7]~158 BinaryCount[8]~160 BinaryCount[9]~162 BinaryCount[10]~164 BinaryCount[11]~166 BinaryCount[12]~167 BinaryCount[12] } "NODE_NAME" } } { "g:/altera/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "g:/altera/quartus/bin/Technology_Viewer.qrui" "2.697 ns" { BinaryCount[0] {} BinaryCount[0]~144 {} BinaryCount[1]~146 {} BinaryCount[2]~148 {} BinaryCount[3]~150 {} BinaryCount[4]~152 {} BinaryCount[5]~154 {} BinaryCount[6]~156 {} BinaryCount[7]~158 {} BinaryCount[8]~160 {} BinaryCount[9]~162 {} BinaryCount[10]~164 {} BinaryCount[11]~166 {} BinaryCount[12]~167 {} BinaryCount[12] {} } { 0.000ns 0.437ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns } { 0.000ns 0.596ns 0.086ns 0.086ns 0.086ns 0.086ns 0.086ns 0.086ns 0.190ns 0.086ns 0.086ns 0.086ns 0.086ns 0.506ns 0.108ns } "" } } { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "2.819 ns" { clk clk~clkctrl BinaryCount[12] } "NODE_NAME" } } { "g:/altera/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "g:/altera/quartus/bin/Technology_Viewer.qrui" "2.819 ns" { clk {} clk~combout {} clk~clkctrl {} BinaryCount[12] {} } { 0.000ns 0.000ns 0.139ns 0.924ns } { 0.000ns 1.090ns 0.000ns 0.666ns } "" } } { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "2.819 ns" { clk clk~clkctrl BinaryCount[0] } "NODE_NAME" } } { "g:/altera/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "g:/altera/quartus/bin/Technology_Viewer.qrui" "2.819 ns" { clk {} clk~combout {} clk~clkctrl {} BinaryCount[0] {} } { 0.000ns 0.000ns 0.139ns 0.924ns } { 0.000ns 1.090ns 0.000ns 0.666ns } "" } } } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0 "" 0}
{ "Info" "ITDB_TSU_RESULT" "BinaryCount\[12\] Enable_in clk 2.679 ns register " "Info: tsu for register \"BinaryCount\[12\]\" (data pin = \"Enable_in\", clock pin = \"clk\") is 2.679 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "5.538 ns + Longest pin register " "Info: + Longest pin to register delay is 5.538 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.100 ns) 1.100 ns Enable_in 1 PIN PIN_89 4 " "Info: 1: + IC(0.000 ns) + CELL(1.100 ns) = 1.100 ns; Loc. = PIN_89; Fanout = 4; PIN Node = 'Enable_in'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "" { Enable_in } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 12 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(2.153 ns) + CELL(0.621 ns) 3.874 ns BinaryCount\[0\]~144 2 COMB LCCOMB_X31_Y15_N0 2 " "Info: 2: + IC(2.153 ns) + CELL(0.621 ns) = 3.874 ns; Loc. = LCCOMB_X31_Y15_N0; Fanout = 2; COMB Node = 'BinaryCount\[0\]~144'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "2.774 ns" { Enable_in BinaryCount[0]~144 } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 22 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 3.960 ns BinaryCount\[1\]~146 3 COMB LCCOMB_X31_Y15_N2 2 " "Info: 3: + IC(0.000 ns) + CELL(0.086 ns) = 3.960 ns; Loc. = LCCOMB_X31_Y15_N2; Fanout = 2; COMB Node = 'BinaryCount\[1\]~146'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { BinaryCount[0]~144 BinaryCount[1]~146 } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 22 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 4.046 ns BinaryCount\[2\]~148 4 COMB LCCOMB_X31_Y15_N4 2 " "Info: 4: + IC(0.000 ns) + CELL(0.086 ns) = 4.046 ns; Loc. = LCCOMB_X31_Y15_N4; Fanout = 2; COMB Node = 'BinaryCount\[2\]~148'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { BinaryCount[1]~146 BinaryCount[2]~148 } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 22 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 4.132 ns BinaryCount\[3\]~150 5 COMB LCCOMB_X31_Y15_N6 2 " "Info: 5: + IC(0.000 ns) + CELL(0.086 ns) = 4.132 ns; Loc. = LCCOMB_X31_Y15_N6; Fanout = 2; COMB Node = 'BinaryCount\[3\]~150'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { BinaryCount[2]~148 BinaryCount[3]~150 } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 22 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 4.218 ns BinaryCount\[4\]~152 6 COMB LCCOMB_X31_Y15_N8 2 " "Info: 6: + IC(0.000 ns) + CELL(0.086 ns) = 4.218 ns; Loc. = LCCOMB_X31_Y15_N8; Fanout = 2; COMB Node = 'BinaryCount\[4\]~152'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { BinaryCount[3]~150 BinaryCount[4]~152 } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 22 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 4.304 ns BinaryCount\[5\]~154 7 COMB LCCOMB_X31_Y15_N10 2 " "Info: 7: + IC(0.000 ns) + CELL(0.086 ns) = 4.304 ns; Loc. = LCCOMB_X31_Y15_N10; Fanout = 2; COMB Node = 'BinaryCount\[5\]~154'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { BinaryCount[4]~152 BinaryCount[5]~154 } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 22 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 4.390 ns BinaryCount\[6\]~156 8 COMB LCCOMB_X31_Y15_N12 2 " "Info: 8: + IC(0.000 ns) + CELL(0.086 ns) = 4.390 ns; Loc. = LCCOMB_X31_Y15_N12; Fanout = 2; COMB Node = 'BinaryCount\[6\]~156'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { BinaryCount[5]~154 BinaryCount[6]~156 } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 22 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.190 ns) 4.580 ns BinaryCount\[7\]~158 9 COMB LCCOMB_X31_Y15_N14 2 " "Info: 9: + IC(0.000 ns) + CELL(0.190 ns) = 4.580 ns; Loc. = LCCOMB_X31_Y15_N14; Fanout = 2; COMB Node = 'BinaryCount\[7\]~158'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "0.190 ns" { BinaryCount[6]~156 BinaryCount[7]~158 } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 22 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 4.666 ns BinaryCount\[8\]~160 10 COMB LCCOMB_X31_Y15_N16 2 " "Info: 10: + IC(0.000 ns) + CELL(0.086 ns) = 4.666 ns; Loc. = LCCOMB_X31_Y15_N16; Fanout = 2; COMB Node = 'BinaryCount\[8\]~160'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { BinaryCount[7]~158 BinaryCount[8]~160 } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 22 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 4.752 ns BinaryCount\[9\]~162 11 COMB LCCOMB_X31_Y15_N18 2 " "Info: 11: + IC(0.000 ns) + CELL(0.086 ns) = 4.752 ns; Loc. = LCCOMB_X31_Y15_N18; Fanout = 2; COMB Node = 'BinaryCount\[9\]~162'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { BinaryCount[8]~160 BinaryCount[9]~162 } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 22 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 4.838 ns BinaryCount\[10\]~164 12 COMB LCCOMB_X31_Y15_N20 2 " "Info: 12: + IC(0.000 ns) + CELL(0.086 ns) = 4.838 ns; Loc. = LCCOMB_X31_Y15_N20; Fanout = 2; COMB Node = 'BinaryCount\[10\]~164'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { BinaryCount[9]~162 BinaryCount[10]~164 } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 22 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 4.924 ns BinaryCount\[11\]~166 13 COMB LCCOMB_X31_Y15_N22 1 " "Info: 13: + IC(0.000 ns) + CELL(0.086 ns) = 4.924 ns; Loc. = LCCOMB_X31_Y15_N22; Fanout = 1; COMB Node = 'BinaryCount\[11\]~166'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { BinaryCount[10]~164 BinaryCount[11]~166 } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 22 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.506 ns) 5.430 ns BinaryCount\[12\]~167 14 COMB LCCOMB_X31_Y15_N24 1 " "Info: 14: + IC(0.000 ns) + CELL(0.506 ns) = 5.430 ns; Loc. = LCCOMB_X31_Y15_N24; Fanout = 1; COMB Node = 'BinaryCount\[12\]~167'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "0.506 ns" { BinaryCount[11]~166 BinaryCount[12]~167 } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 22 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.108 ns) 5.538 ns BinaryCount\[12\] 15 REG LCFF_X31_Y15_N25 3 " "Info: 15: + IC(0.000 ns) + CELL(0.108 ns) = 5.538 ns; Loc. = LCFF_X31_Y15_N25; Fanout = 3; REG Node = 'BinaryCount\[12\]'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "0.108 ns" { BinaryCount[12]~167 BinaryCount[12] } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 22 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.385 ns ( 61.12 % ) " "Info: Total cell delay = 3.385 ns ( 61.12 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.153 ns ( 38.88 % ) " "Info: Total interconnect delay = 2.153 ns ( 38.88 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0} } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "5.538 ns" { Enable_in BinaryCount[0]~144 BinaryCount[1]~146 BinaryCount[2]~148 BinaryCount[3]~150 BinaryCount[4]~152 BinaryCount[5]~154 BinaryCount[6]~156 BinaryCount[7]~158 BinaryCount[8]~160 BinaryCount[9]~162 BinaryCount[10]~164 BinaryCount[11]~166 BinaryCount[12]~167 BinaryCount[12] } "NODE_NAME" } } { "g:/altera/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "g:/altera/quartus/bin/Technology_Viewer.qrui" "5.538 ns" { Enable_in {} Enable_in~combout {} BinaryCount[0]~144 {} BinaryCount[1]~146 {} BinaryCount[2]~148 {} BinaryCount[3]~150 {} BinaryCount[4]~152 {} BinaryCount[5]~154 {} BinaryCount[6]~156 {} BinaryCount[7]~158 {} BinaryCount[8]~160 {} BinaryCount[9]~162 {} BinaryCount[10]~164 {} BinaryCount[11]~166 {} BinaryCount[12]~167 {} BinaryCount[12] {} } { 0.000ns 0.000ns 2.153ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns } { 0.000ns 1.100ns 0.621ns 0.086ns 0.086ns 0.086ns 0.086ns 0.086ns 0.086ns 0.190ns 0.086ns 0.086ns 0.086ns 0.086ns 0.506ns 0.108ns } "" } } } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TSU_DELAY" "-0.040 ns + " "Info: + Micro setup delay of destination is -0.040 ns" { } { { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 22 -1 0 } } } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 2.819 ns - Shortest register " "Info: - Shortest clock path from clock \"clk\" to destination register is 2.819 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.090 ns) 1.090 ns clk 1 CLK PIN_17 1 " "Info: 1: + IC(0.000 ns) + CELL(1.090 ns) = 1.090 ns; Loc. = PIN_17; Fanout = 1; CLK Node = 'clk'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 14 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.139 ns) + CELL(0.000 ns) 1.229 ns clk~clkctrl 2 COMB CLKCTRL_G2 26 " "Info: 2: + IC(0.139 ns) + CELL(0.000 ns) = 1.229 ns; Loc. = CLKCTRL_G2; Fanout = 26; COMB Node = 'clk~clkctrl'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "0.139 ns" { clk clk~clkctrl } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 14 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.924 ns) + CELL(0.666 ns) 2.819 ns BinaryCount\[12\] 3 REG LCFF_X31_Y15_N25 3 " "Info: 3: + IC(0.924 ns) + CELL(0.666 ns) = 2.819 ns; Loc. = LCFF_X31_Y15_N25; Fanout = 3; REG Node = 'BinaryCount\[12\]'" { } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "1.590 ns" { clk~clkctrl BinaryCount[12] } "NODE_NAME" } } { "GrayCounter.vhd" "" { Text "G:/altera/quartus/tlc5510/GrayCounter.vhd" 22 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.756 ns ( 62.29 % ) " "Info: Total cell delay = 1.756 ns ( 62.29 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.063 ns ( 37.71 % ) " "Info: Total interconnect delay = 1.063 ns ( 37.71 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0} } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "2.819 ns" { clk clk~clkctrl BinaryCount[12] } "NODE_NAME" } } { "g:/altera/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "g:/altera/quartus/bin/Technology_Viewer.qrui" "2.819 ns" { clk {} clk~combout {} clk~clkctrl {} BinaryCount[12] {} } { 0.000ns 0.000ns 0.139ns 0.924ns } { 0.000ns 1.090ns 0.000ns 0.666ns } "" } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0} } { { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "5.538 ns" { Enable_in BinaryCount[0]~144 BinaryCount[1]~146 BinaryCount[2]~148 BinaryCount[3]~150 BinaryCount[4]~152 BinaryCount[5]~154 BinaryCount[6]~156 BinaryCount[7]~158 BinaryCount[8]~160 BinaryCount[9]~162 BinaryCount[10]~164 BinaryCount[11]~166 BinaryCount[12]~167 BinaryCount[12] } "NODE_NAME" } } { "g:/altera/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "g:/altera/quartus/bin/Technology_Viewer.qrui" "5.538 ns" { Enable_in {} Enable_in~combout {} BinaryCount[0]~144 {} BinaryCount[1]~146 {} BinaryCount[2]~148 {} BinaryCount[3]~150 {} BinaryCount[4]~152 {} BinaryCount[5]~154 {} BinaryCount[6]~156 {} BinaryCount[7]~158 {} BinaryCount[8]~160 {} BinaryCount[9]~162 {} BinaryCount[10]~164 {} BinaryCount[11]~166 {} BinaryCount[12]~167 {} BinaryCount[12] {} } { 0.000ns 0.000ns 2.153ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns } { 0.000ns 1.100ns 0.621ns 0.086ns 0.086ns 0.086ns 0.086ns 0.086ns 0.086ns 0.190ns 0.086ns 0.086ns 0.086ns 0.086ns 0.506ns 0.108ns } "" } } { "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "g:/altera/quartus/bin/TimingClosureFloorplan.fld" "" "2.819 ns" { clk clk~clkctrl BinaryCount[12] } "NODE_NAME" } } { "g:/altera/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "g:/altera/quartus/bin/Technology_Viewer.qrui" "2.819 ns" { clk {} clk~combout {} clk~clkctrl {} BinaryCount[12] {} } { 0.000ns 0.000ns 0.139ns 0.924ns } { 0.000ns 1.090ns 0.000ns 0.666ns } "" } } } 0 0 "tsu for %5!s! \"%1!s!\" (data pin = \"%2!s!\", clock pin = \"%3!s!\") is %4!s!" 0 0 "" 0}
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