first.fit.summary

verilog 初学者原代码

Fitter Status : Successful - Sat Apr 04 23:17:12 2009
Quartus II Version : 7.2 Build 175 11/20/2007 SP 1 SJ Full Version
Revision Name : first
Top-level Entity Name : first
Family : MAX II
Device : EPM240F100C5
Timing Models : Final
Total logic elements : 0 / 240 ( 0 % )
Total pins : 16 / 80 ( 20 % )
Total virtual pins : 0
UFM blocks : 0 / 1 ( 0 % )