📄 edge.fit
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-- MAX+plus II Compiler Fit File
-- Version 10.0 9/14/2000
-- Compiled: 06/05/2003 18:20:08
-- Copyright (C) 1988-2000 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera. Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner. Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors. No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.
CHIP "edge"
BEGIN
DEVICE = "EPF10K10LC84-3";
"ck" : INPUT_PIN = 1 ;
"in" : INPUT_PIN = 2 ;
"out" : OUTPUT_PIN = 25 ;
":1" : LOCATION = LC1_B2 ;
":6" : LOCATION = LC8_B2 ;
END;
INTERNAL_INFO "edge"
BEGIN
DEVICE = EPF10K10LC84-3;
OD4P1 : LORAX = "1:FB4->LC1_B2,->LC8_B2|";
OD1P2 : LORAX = "1:FB1|2:FH1R1,PA20R1C1->LC1_B2||";
LC8_B2 : LORAX = "1:MSW7R1C1,HHL35R1->OH15R1P25|";
LC1_B2 : LORAX2 = "OD1P2, X, X, X";
LC8_B2 : LORAX2 = "X, X, X, LC1_B2";
END;
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