📄 pll1.pin
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-- Copyright (C) 1988-2000 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera. Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner. Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors. No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.
N.C. = No Connect. This pin has no internal connection to the device.
VCCINT = Dedicated power pin, which MUST be connected to VCC (2.5 volts).
VCCIO1 = Dedicated power pin, which MUST be connected to VCC (3.3 volts).
VCCIO2 = Dedicated power pin, which MUST be connected to VCC (3.3 volts).
GND = Dedicated ground pin or unused dedicated input, which MUST be connected to GND.
GND* = These I/O pins can either be left unconnected or connected to GND. Connecting these pins to GND will improve the device's immunity to noise.
RESERVED = Unused I/O pin, which MUST be left unconnected.
----------------------------------------------------------------------------
CHIP "pll1" ASSIGNED TO AN EPM7032BLC44-3
GND : 1
fosc : 2
VCCINT : 3
reset : 4
GND* : 5
GND* : 6
TDI : 7
GND* : 8
GND* : 9
GND : 10
GND* : 11
GND* : 12
TMS : 13
GND* : 14
VCCIO1 : 15
GND* : 16
GND* : 17
GND* : 18
GND* : 19
GND* : 20
GND* : 21
GND : 22
VCCINT : 23
GND* : 24
GND* : 25
GND* : 26
GND* : 27
ahead : 28
lag : 29
GND : 30
GND* : 31
TCK : 32
GND* : 33
GND* : 34
VCCIO2 : 35
GND* : 36
GND* : 37
TDO : 38
GND* : 39
GND* : 40
fo : 41
GND : 42
fi : 43
GND : 44
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