📄 subadd.tan.rpt
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Classic Timing Analyzer report for subadd
Tue Apr 28 17:26:51 2009
Quartus II Version 8.1 Build 163 10/28/2008 SJ Full Version
---------------------
; Table of Contents ;
---------------------
1. Legal Notice
2. Timing Analyzer Summary
3. Timing Analyzer Settings
4. tpd
5. Timing Analyzer Messages
----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2008 Altera Corporation
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, Altera MegaCore Function License
Agreement, or other applicable license agreement, including,
without limitation, that your use is for the sole purpose of
programming logic devices manufactured by Altera and sold by
Altera or its authorized distributors. Please refer to the
applicable agreement for further details.
+-------------------------------------------------------------------------------------------------------------------------+
; Timing Analyzer Summary ;
+------------------------------+-------+---------------+-------------+------+------+------------+----------+--------------+
; Type ; Slack ; Required Time ; Actual Time ; From ; To ; From Clock ; To Clock ; Failed Paths ;
+------------------------------+-------+---------------+-------------+------+------+------------+----------+--------------+
; Worst-case tpd ; N/A ; None ; 16.025 ns ; B[0] ; S[3] ; -- ; -- ; 0 ;
; Total number of failed paths ; ; ; ; ; ; ; ; 0 ;
+------------------------------+-------+---------------+-------------+------+------+------------+----------+--------------+
+--------------------------------------------------------------------------------------------------------------------+
; Timing Analyzer Settings ;
+---------------------------------------------------------------------+--------------------+------+----+-------------+
; Option ; Setting ; From ; To ; Entity Name ;
+---------------------------------------------------------------------+--------------------+------+----+-------------+
; Device Name ; EP1C6Q240C8 ; ; ; ;
; Timing Models ; Final ; ; ; ;
; Default hold multicycle ; Same as Multicycle ; ; ; ;
; Cut paths between unrelated clock domains ; On ; ; ; ;
; Cut off read during write signal paths ; On ; ; ; ;
; Cut off feedback from I/O pins ; On ; ; ; ;
; Report Combined Fast/Slow Timing ; Off ; ; ; ;
; Ignore Clock Settings ; Off ; ; ; ;
; Analyze latches as synchronous elements ; On ; ; ; ;
; Enable Recovery/Removal analysis ; Off ; ; ; ;
; Enable Clock Latency ; Off ; ; ; ;
; Use TimeQuest Timing Analyzer ; Off ; ; ; ;
; Minimum Core Junction Temperature ; 0 ; ; ; ;
; Maximum Core Junction Temperature ; 85 ; ; ; ;
; Number of source nodes to report per destination node ; 10 ; ; ; ;
; Number of destination nodes to report ; 10 ; ; ; ;
; Number of paths to report ; 200 ; ; ; ;
; Report Minimum Timing Checks ; Off ; ; ; ;
; Use Fast Timing Models ; Off ; ; ; ;
; Report IO Paths Separately ; Off ; ; ; ;
; Perform Multicorner Analysis ; Off ; ; ; ;
; Reports the worst-case path for each clock domain and analysis ; Off ; ; ; ;
; Removes common clock path pessimism (CCPP) during slack computation ; Off ; ; ; ;
; Output I/O Timing Endpoint ; Near End ; ; ; ;
+---------------------------------------------------------------------+--------------------+------+----+-------------+
+-----------------------------------------------------------+
; tpd ;
+-------+-------------------+-----------------+------+------+
; Slack ; Required P2P Time ; Actual P2P Time ; From ; To ;
+-------+-------------------+-----------------+------+------+
; N/A ; None ; 16.025 ns ; B[0] ; S[3] ;
; N/A ; None ; 15.949 ns ; B[0] ; S[2] ;
; N/A ; None ; 15.710 ns ; B[1] ; S[3] ;
; N/A ; None ; 15.634 ns ; B[1] ; S[2] ;
; N/A ; None ; 15.611 ns ; A[1] ; S[3] ;
; N/A ; None ; 15.535 ns ; A[1] ; S[2] ;
; N/A ; None ; 15.477 ns ; B[2] ; S[3] ;
; N/A ; None ; 15.447 ns ; B[0] ; S[1] ;
; N/A ; None ; 15.401 ns ; B[2] ; S[2] ;
; N/A ; None ; 15.212 ns ; A[0] ; S[3] ;
; N/A ; None ; 15.136 ns ; A[0] ; S[2] ;
; N/A ; None ; 15.132 ns ; B[1] ; S[1] ;
; N/A ; None ; 15.033 ns ; A[1] ; S[1] ;
; N/A ; None ; 14.973 ns ; A[2] ; S[3] ;
; N/A ; None ; 14.899 ns ; B[2] ; S[1] ;
; N/A ; None ; 14.897 ns ; A[2] ; S[2] ;
; N/A ; None ; 14.852 ns ; B[0] ; S[0] ;
; N/A ; None ; 14.634 ns ; A[0] ; S[1] ;
; N/A ; None ; 14.537 ns ; B[1] ; S[0] ;
; N/A ; None ; 14.438 ns ; A[1] ; S[0] ;
; N/A ; None ; 14.395 ns ; A[2] ; S[1] ;
; N/A ; None ; 14.304 ns ; B[2] ; S[0] ;
; N/A ; None ; 14.039 ns ; A[0] ; S[0] ;
; N/A ; None ; 13.878 ns ; B[3] ; S[3] ;
; N/A ; None ; 13.802 ns ; B[3] ; S[2] ;
; N/A ; None ; 13.800 ns ; A[2] ; S[0] ;
; N/A ; None ; 13.737 ns ; A[3] ; S[3] ;
; N/A ; None ; 13.661 ns ; A[3] ; S[2] ;
; N/A ; None ; 13.300 ns ; B[3] ; S[1] ;
; N/A ; None ; 13.196 ns ; G ; S[3] ;
; N/A ; None ; 13.159 ns ; A[3] ; S[1] ;
; N/A ; None ; 13.120 ns ; G ; S[2] ;
; N/A ; None ; 12.980 ns ; B[0] ; Co ;
; N/A ; None ; 12.705 ns ; B[3] ; S[0] ;
; N/A ; None ; 12.666 ns ; B[1] ; Co ;
; N/A ; None ; 12.618 ns ; G ; S[1] ;
; N/A ; None ; 12.567 ns ; A[1] ; Co ;
; N/A ; None ; 12.564 ns ; A[3] ; S[0] ;
; N/A ; None ; 12.167 ns ; A[0] ; Co ;
; N/A ; None ; 12.148 ns ; B[2] ; Co ;
; N/A ; None ; 12.018 ns ; G ; S[0] ;
; N/A ; None ; 11.346 ns ; G ; Co ;
; N/A ; None ; 11.326 ns ; A[2] ; Co ;
; N/A ; None ; 11.139 ns ; B[3] ; Co ;
; N/A ; None ; 11.036 ns ; A[3] ; Co ;
+-------+-------------------+-----------------+------+------+
+--------------------------+
; Timing Analyzer Messages ;
+--------------------------+
Info: *******************************************************************
Info: Running Quartus II Classic Timing Analyzer
Info: Version 8.1 Build 163 10/28/2008 SJ Full Version
Info: Processing started: Tue Apr 28 17:26:50 2009
Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off subadd -c subadd --timing_analysis_only
Info: Parallel compilation is enabled and will use 2 of the 2 processors detected
Info: Longest tpd from source pin "B[0]" to destination pin "S[3]" is 16.025 ns
Info: 1: + IC(0.000 ns) + CELL(1.475 ns) = 1.475 ns; Loc. = PIN_240; Fanout = 3; PIN Node = 'B[0]'
Info: 2: + IC(5.402 ns) + CELL(0.590 ns) = 7.467 ns; Loc. = LC_X4_Y20_N6; Fanout = 1; COMB Node = 'LessThan0~265'
Info: 3: + IC(0.438 ns) + CELL(0.114 ns) = 8.019 ns; Loc. = LC_X4_Y20_N1; Fanout = 3; COMB Node = 'LessThan0~267'
Info: 4: + IC(0.454 ns) + CELL(0.590 ns) = 9.063 ns; Loc. = LC_X4_Y20_N4; Fanout = 6; COMB Node = 'LessThan0~266'
Info: 5: + IC(0.826 ns) + CELL(0.442 ns) = 10.331 ns; Loc. = LC_X3_Y20_N9; Fanout = 3; COMB Node = 'Add0~242'
Info: 6: + IC(0.430 ns) + CELL(0.575 ns) = 11.336 ns; Loc. = LC_X3_Y20_N1; Fanout = 2; COMB Node = 'Add0~234COUT1_259'
Info: 7: + IC(0.000 ns) + CELL(0.080 ns) = 11.416 ns; Loc. = LC_X3_Y20_N2; Fanout = 2; COMB Node = 'Add0~236COUT1_261'
Info: 8: + IC(0.000 ns) + CELL(0.080 ns) = 11.496 ns; Loc. = LC_X3_Y20_N3; Fanout = 1; COMB Node = 'Add0~238COUT1_263'
Info: 9: + IC(0.000 ns) + CELL(0.608 ns) = 12.104 ns; Loc. = LC_X3_Y20_N4; Fanout = 1; COMB Node = 'Add0~239'
Info: 10: + IC(1.797 ns) + CELL(2.124 ns) = 16.025 ns; Loc. = PIN_4; Fanout = 0; PIN Node = 'S[3]'
Info: Total cell delay = 6.678 ns ( 41.67 % )
Info: Total interconnect delay = 9.347 ns ( 58.33 % )
Info: Parallel compilation was enabled but no parallel operations were performed
Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 0 warnings
Info: Peak virtual memory: 126 megabytes
Info: Processing ended: Tue Apr 28 17:26:51 2009
Info: Elapsed time: 00:00:01
Info: Total CPU time (on all processors): 00:00:01
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