function.sim.qmsg

利用图元实现层次化设计,编程完成数字序列的乘积求和

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Simulator Quartus II " "Info: Running Quartus II Simulator" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 6.0 Build 178 04/27/2006 SJ Full Version " "Info: Version 6.0 Build 178 04/27/2006 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Thu Apr 02 13:05:05 2009 " "Info: Processing started: Thu Apr 02 13:05:05 2009" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sim --read_settings_files=on --write_settings_files=off function -c function " "Info: Command: quartus_sim --read_settings_files=on --write_settings_files=off function -c function" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Info" "IEDS_MAX_TRANSITION_COUNT" "" "Info: Option to preserve fewer signal transitions to reduce memory requirements is enabled" { { "Info" "IEDS_MAX_TRANSITION_COUNT_EXP" "" "Info: Simulation has been partitioned into sub-simulations according to the maximum transition count determined by the engine. Transitions from memory will be flushed out to disk at the end of each sub-simulation to reduce memory requirements." {  } {  } 0 0 "Simulation has been partitioned into sub-simulations according to the maximum transition count determined by the engine. Transitions from memory will be flushed out to disk at the end of each sub-simulation to reduce memory requirements." 0 0}  } {  } 0 0 "Option to preserve fewer signal transitions to reduce memory requirements is enabled" 0 0}
{ "Warning" "WSDB_CLOCK_SENSITIVE_CHANGE" "\|Block1\|lpm_dff5:inst10\|lpm_ff:lpm_ff_component\|dffs\[3\] 35.0 ns " "Warning: Found clock-sensitive change during active clock edge at time 35.0 ns on register \"\|Block1\|lpm_dff5:inst10\|lpm_ff:lpm_ff_component\|dffs\[3\]\"" {  } {  } 0 0 "Found clock-sensitive change during active clock edge at time %2!s! on register \"%1!s!\"" 0 0}
{ "Warning" "WSDB_CLOCK_SENSITIVE_CHANGE" "\|Block1\|lpm_dff5:inst10\|lpm_ff:lpm_ff_component\|dffs\[2\] 35.0 ns " "Warning: Found clock-sensitive change during active clock edge at time 35.0 ns on register \"\|Block1\|lpm_dff5:inst10\|lpm_ff:lpm_ff_component\|dffs\[2\]\"" {  } {  } 0 0 "Found clock-sensitive change during active clock edge at time %2!s! on register \"%1!s!\"" 0 0}
{ "Info" "IEDS_SUB_SIMULATION_COUNT" "1 " "Info: Simulation partitioned into 1 sub-simulations" {  } {  } 0 0 "Simulation partitioned into %1!d! sub-simulations" 0 0}
{ "Info" "ISIM_SIM_SIMULATION_COVERAGE" "     77.66 % " "Info: Simulation coverage is      77.66 %" {  } {  } 0 0 "Simulation coverage is %1!s!" 0 0}
{ "Info" "ISIM_SIM_NUMBER_OF_TRANSITION" "6957 " "Info: Number of transitions in simulation is 6957" {  } {  } 0 0 "Number of transitions in simulation is %1!s!" 0 0}
{ "Info" "ISDB_SDB_PROMOTE_WRITE_BINARY_VECTOR" "function.sim.vwf " "Info: Vector file function.sim.vwf is saved in VWF text format. You can compress it into CVWF format in order to reduce file size. For more details please refer to the Quartus II Help." {  } {  } 0 0 "Vector file %1!s! is saved in VWF text format. You can compress it into CVWF format in order to reduce file size. For more details please refer to the Quartus II Help." 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Simulator 0 s 2 s Quartus II " "Info: Quartus II Simulator was successful. 0 errors, 2 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Thu Apr 02 13:05:06 2009 " "Info: Processing ended: Thu Apr 02 13:05:06 2009" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}