📄 tlc5615.map.eqn
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-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions
-- and other software and tools, and its AMPP partner logic
-- functions, and any output files any of the foregoing
-- (including device programming or simulation files), and any
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-- to the terms and conditions of the Altera Program License
-- Subscription Agreement, Altera MegaCore Function License
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-- without limitation, that your use is for the sole purpose of
-- programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the
-- applicable agreement for further details.
--D1_SIN is tlc5615_1:TLC|SIN
--operation mode is normal
D1_SIN_lut_out = D1_SNCS & (D1L32 & !D1L8 # !D1L32 & (D1_SIN));
D1_SIN = DFFEA(D1_SIN_lut_out, clk, !rst, , , , );
--D1L9Q is tlc5615_1:TLC|SIN~186
--operation mode is normal
D1L9Q = D1_SIN;
--D1_SCL is tlc5615_1:TLC|SCL
--operation mode is normal
D1_SCL_lut_out = D1_SNCS & (D1_clk250 & D1_SCL & D1_clk250_d # !D1_clk250 & (D1_SCL # D1_clk250_d));
D1_SCL = DFFEA(D1_SCL_lut_out, clk, !rst, , , , );
--D1L6Q is tlc5615_1:TLC|SCL~69
--operation mode is normal
D1L6Q = D1_SCL;
--D1_SNCS is tlc5615_1:TLC|SNCS
--operation mode is normal
D1_SNCS_lut_out = D1_SNCS & D1L21 # !D1_SNCS & (D1_ncs_d & !B1_ncs);
D1_SNCS = DFFEA(D1_SNCS_lut_out, clk, !rst, , , , );
--D1L31Q is tlc5615_1:TLC|SNCS~117
--operation mode is normal
D1L31Q = D1_SNCS;
--D1_reg_data[9] is tlc5615_1:TLC|reg_data[9]
--operation mode is normal
D1_reg_data[9]_lut_out = D1L02 & B1_wr_data[9] # !D1L02 & (D1L57);
D1_reg_data[9] = DFFEA(D1_reg_data[9]_lut_out, clk, !rst, , , , );
--D1L47Q is tlc5615_1:TLC|reg_data[9]~1918
--operation mode is normal
D1L47Q = D1_reg_data[9];
--D1_scounter[3] is tlc5615_1:TLC|scounter[3]
--operation mode is normal
D1_scounter[3]_lut_out = D1L51 & D1_SNCS;
D1_scounter[3] = DFFEA(D1_scounter[3]_lut_out, clk, !rst, , A1L6, , );
--D1L301Q is tlc5615_1:TLC|scounter[3]~115
--operation mode is normal
D1L301Q = D1_scounter[3];
--D1_scounter[2] is tlc5615_1:TLC|scounter[2]
--operation mode is normal
D1_scounter[2]_lut_out = D1_SNCS & (D1_scounter[2] $ D1L61);
D1_scounter[2] = DFFEA(D1_scounter[2]_lut_out, clk, !rst, , A1L6, , );
--D1L101Q is tlc5615_1:TLC|scounter[2]~116
--operation mode is normal
D1L101Q = D1_scounter[2];
--D1_scounter[1] is tlc5615_1:TLC|scounter[1]
--operation mode is normal
D1_scounter[1]_lut_out = A1L8;
D1_scounter[1] = DFFEA(D1_scounter[1]_lut_out, clk, !rst, , A1L01, , );
--D1L99Q is tlc5615_1:TLC|scounter[1]~117
--operation mode is normal
D1L99Q = D1_scounter[1];
--D1L8 is tlc5615_1:TLC|SIN~184
--operation mode is normal
D1L8 = D1_reg_data[9] # D1_scounter[3] & (D1_scounter[2] # D1_scounter[1]);
--D1L01 is tlc5615_1:TLC|SIN~187
--operation mode is normal
D1L01 = D1_reg_data[9] # D1_scounter[3] & (D1_scounter[2] # D1_scounter[1]);
--D1_scl_d is tlc5615_1:TLC|scl_d
--operation mode is normal
D1_scl_d_lut_out = !D1_SCL;
D1_scl_d = DFFEA(D1_scl_d_lut_out, clk, !rst, , , , );
--D1L49Q is tlc5615_1:TLC|scl_d~3
--operation mode is normal
D1L49Q = D1_scl_d;
--D1L32 is tlc5615_1:TLC|always9~53
--operation mode is normal
D1L32 = D1_SCL & D1_scl_d;
--D1L42 is tlc5615_1:TLC|always9~54
--operation mode is normal
D1L42 = D1_SCL & D1_scl_d;
--D1_clk250 is tlc5615_1:TLC|clk250
--operation mode is normal
D1_clk250_lut_out = !D1_clk250;
D1_clk250 = DFFEA(D1_clk250_lut_out, clk, !rst, , D1L05, , );
--D1L82Q is tlc5615_1:TLC|clk250~3
--operation mode is normal
D1L82Q = D1_clk250;
--D1_clk250_d is tlc5615_1:TLC|clk250_d
--operation mode is normal
D1_clk250_d_lut_out = D1_clk250;
D1_clk250_d = DFFEA(D1_clk250_d_lut_out, clk, !rst, , , , );
--D1L72Q is tlc5615_1:TLC|clk250_d~5
--operation mode is normal
D1L72Q = D1_clk250_d;
--D1_scounter[0] is tlc5615_1:TLC|scounter[0]
--operation mode is normal
D1_scounter[0]_lut_out = D1L32 & D1_SNCS & !D1_scounter[0];
D1_scounter[0] = DFFEA(D1_scounter[0]_lut_out, clk, !rst, , A1L01, , );
--D1L79Q is tlc5615_1:TLC|scounter[0]~118
--operation mode is normal
D1L79Q = D1_scounter[0];
--D1L21 is tlc5615_1:TLC|SNCS~115
--operation mode is normal
D1L21 = D1_scounter[1] # !D1_scounter[0] # !D1_scounter[2] # !D1_scounter[3];
--D1L41 is tlc5615_1:TLC|SNCS~118
--operation mode is normal
D1L41 = D1_scounter[1] # !D1_scounter[0] # !D1_scounter[2] # !D1_scounter[3];
--D1_ncs_d is tlc5615_1:TLC|ncs_d
--operation mode is normal
D1_ncs_d_lut_out = B1_ncs;
D1_ncs_d = DFFEA(D1_ncs_d_lut_out, clk, !rst, , , , );
--D1L94Q is tlc5615_1:TLC|ncs_d~1
--operation mode is normal
D1L94Q = D1_ncs_d;
--B1_ncs is ctrl:HH|ncs
--operation mode is normal
B1_ncs_lut_out = B1_ncs & (B1L54 # B1_cter[2] & B1L94) # !B1_ncs & (B1_cter[2] & B1L94);
B1_ncs = DFFEA(B1_ncs_lut_out, clk, !rst, , , , );
--B1L44Q is ctrl:HH|ncs~59
--operation mode is normal
B1L44Q = B1_ncs;
--B1_wr_data[9] is ctrl:HH|wr_data[9]
--operation mode is normal
B1_wr_data[9]_lut_out = C1_data[9];
B1_wr_data[9] = DFFEA(B1_wr_data[9]_lut_out, clk, !rst, , B1L15, , );
--B1L97Q is ctrl:HH|wr_data[9]~20
--operation mode is normal
B1L97Q = B1_wr_data[9];
--D1_reg_data[8] is tlc5615_1:TLC|reg_data[8]
--operation mode is normal
D1_reg_data[8]_lut_out = D1L02 & B1_wr_data[8] # !D1L02 & (D1L67);
D1_reg_data[8] = DFFEA(D1_reg_data[8]_lut_out, clk, !rst, , , , );
--D1L27Q is tlc5615_1:TLC|reg_data[8]~1919
--operation mode is normal
D1L27Q = D1_reg_data[8];
--D1L91 is tlc5615_1:TLC|always6~47
--operation mode is normal
D1L91 = D1_SNCS & (!D1_SCL & !D1_scl_d);
--D1L12 is tlc5615_1:TLC|always6~49
--operation mode is normal
D1L12 = D1_SNCS & (!D1_SCL & !D1_scl_d);
--D1L57 is tlc5615_1:TLC|reg_data~1899
--operation mode is normal
D1L57 = D1L91 & D1_reg_data[8] # !D1L91 & (D1_reg_data[9]);
--D1L48 is tlc5615_1:TLC|reg_data~1920
--operation mode is normal
D1L48 = D1L91 & D1_reg_data[8] # !D1L91 & (D1_reg_data[9]);
--D1L02 is tlc5615_1:TLC|always6~48
--operation mode is normal
D1L02 = B1_ncs & (!D1_SNCS & !D1_ncs_d);
--D1L22 is tlc5615_1:TLC|always6~50
--operation mode is normal
D1L22 = B1_ncs & (!D1_SNCS & !D1_ncs_d);
--D1_cter[0] is tlc5615_1:TLC|cter[0]
--operation mode is arithmetic
D1_cter[0]_lut_out = D1L1 & !D1_cter[0];
D1_cter[0] = DFFEA(D1_cter[0]_lut_out, clk, !rst, , D1L1, , );
--D1L13Q is tlc5615_1:TLC|cter[0]~159
--operation mode is arithmetic
D1L13Q = D1_cter[0];
--H9_cout[0] is tlc5615_1:TLC|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[0]
--operation mode is arithmetic
H9_cout[0] = CARRY(D1_cter[0]);
--D1_cter[4] is tlc5615_1:TLC|cter[4]
--operation mode is normal
D1_cter[4]_lut_out = D1L2 & H9_cs_buffer[4];
D1_cter[4] = DFFEA(D1_cter[4]_lut_out, clk, !rst, , D1L1, , );
--D1L93Q is tlc5615_1:TLC|cter[4]~160
--operation mode is normal
D1L93Q = D1_cter[4];
--D1_cter[3] is tlc5615_1:TLC|cter[3]
--operation mode is normal
D1_cter[3]_lut_out = H9_cs_buffer[3] & D1L2;
D1_cter[3] = DFFEA(D1_cter[3]_lut_out, clk, !rst, , D1L1, , );
--D1L73Q is tlc5615_1:TLC|cter[3]~161
--operation mode is normal
D1L73Q = D1_cter[3];
--D1_cter[2] is tlc5615_1:TLC|cter[2]
--operation mode is normal
D1_cter[2]_lut_out = H9_cs_buffer[2] & D1L2;
D1_cter[2] = DFFEA(D1_cter[2]_lut_out, clk, !rst, , D1L1, , );
--D1L53Q is tlc5615_1:TLC|cter[2]~162
--operation mode is normal
D1L53Q = D1_cter[2];
--D1_cter[1] is tlc5615_1:TLC|cter[1]
--operation mode is normal
D1_cter[1]_lut_out = H9_cs_buffer[1] & D1L2;
D1_cter[1] = DFFEA(D1_cter[1]_lut_out, clk, !rst, , D1L1, , );
--D1L33Q is tlc5615_1:TLC|cter[1]~163
--operation mode is normal
D1L33Q = D1_cter[1];
--D1L15 is tlc5615_1:TLC|reduce_nor~36
--operation mode is normal
D1L15 = D1_cter[4] & D1_cter[3] & D1_cter[2] & D1_cter[1];
--D1L25 is tlc5615_1:TLC|reduce_nor~37
--operation mode is normal
D1L25 = D1_cter[4] & D1_cter[3] & D1_cter[2] & D1_cter[1];
--D1_cter[7] is tlc5615_1:TLC|cter[7]
--operation mode is normal
D1_cter[7]_lut_out = H9_cs_buffer[7];
D1_cter[7] = DFFEA(D1_cter[7]_lut_out, clk, !rst, , D1L2, , );
--D1L54Q is tlc5615_1:TLC|cter[7]~164
--operation mode is normal
D1L54Q = D1_cter[7];
--D1_cter[6] is tlc5615_1:TLC|cter[6]
--operation mode is normal
D1_cter[6]_lut_out = H9_cs_buffer[6];
D1_cter[6] = DFFEA(D1_cter[6]_lut_out, clk, !rst, , D1L2, , );
--D1L34Q is tlc5615_1:TLC|cter[6]~165
--operation mode is normal
D1L34Q = D1_cter[6];
--D1_cter[5] is tlc5615_1:TLC|cter[5]
--operation mode is normal
D1_cter[5]_lut_out = H9_cs_buffer[5];
D1_cter[5] = DFFEA(D1_cter[5]_lut_out, clk, !rst, , D1L2, , );
--D1L14Q is tlc5615_1:TLC|cter[5]~166
--operation mode is normal
D1L14Q = D1_cter[5];
--D1_cter[8] is tlc5615_1:TLC|cter[8]
--operation mode is normal
D1_cter[8]_lut_out = F3_unreg_res_node[8];
D1_cter[8] = DFFEA(D1_cter[8]_lut_out, clk, !rst, , D1L2, , );
--D1L74Q is tlc5615_1:TLC|cter[8]~167
--operation mode is normal
D1L74Q = D1_cter[8];
--D1L1 is tlc5615_1:TLC|LessThan~137
--operation mode is normal
D1L1 = !D1_cter[7] & !D1_cter[6] & !D1_cter[5] & !D1_cter[8];
--D1L3 is tlc5615_1:TLC|LessThan~139
--operation mode is normal
D1L3 = !D1_cter[7] & !D1_cter[6] & !D1_cter[5] & !D1_cter[8];
--D1L05 is tlc5615_1:TLC|reduce_nor~0
--operation mode is normal
D1L05 = D1_cter[0] & D1L15 & D1L1;
--D1L35 is tlc5615_1:TLC|reduce_nor~38
--operation mode is normal
D1L35 = D1_cter[0] & D1L15 & D1L1;
--B1_cter[2] is ctrl:HH|cter[2]
--operation mode is normal
B1_cter[2]_lut_out = H3_cs_buffer[2];
B1_cter[2] = DFFEA(B1_cter[2]_lut_out, clk, !rst, , B1L2, , );
--B1L51Q is ctrl:HH|cter[2]~615
--operation mode is normal
B1L51Q = B1_cter[2];
--B1_cter[1] is ctrl:HH|cter[1]
--operation mode is normal
B1_cter[1]_lut_out = H3_cs_buffer[1];
B1_cter[1] = DFFEA(B1_cter[1]_lut_out, clk, !rst, , B1L2, , );
--B1L31Q is ctrl:HH|cter[1]~616
--operation mode is normal
B1L31Q = B1_cter[1];
--B1_cter[3] is ctrl:HH|cter[3]
--operation mode is normal
B1_cter[3]_lut_out = B1L2 & H3_cs_buffer[3];
B1_cter[3] = DFFEA(B1_cter[3]_lut_out, clk, !rst, , A1L7, , );
--B1L71Q is ctrl:HH|cter[3]~617
--operation mode is normal
B1L71Q = B1_cter[3];
--B1_cter[8] is ctrl:HH|cter[8]
--operation mode is normal
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