shifter.fit.summary

来自「移位运算器SHIFTER 使用Verilog HDL 语言编写」· SUMMARY 代码 · 共 13 行

Fitter Status : Successful - Sun Apr 19 10:47:38 2009
Quartus II Version : 7.2 Build 207 03/18/2008 SP 3 SJ Full Version
Revision Name : shifter
Top-level Entity Name : shifter
Family : Cyclone
Device : EP1C12Q240C8
Timing Models : Final
Total logic elements : 29 / 12,060 ( < 1 % )
Total pins : 22 / 173 ( 13 % )
Total virtual pins : 0
Total memory bits : 0 / 239,616 ( 0 % )
Total PLLs : 0 / 2 ( 0 % )