mcu8951.fit.eqn

Alera 的8051 IP core的示例文件5个

--UB1L62 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s024bo:U2|ALUC~2050 at LCCOMB_X14_Y2_N26
UB1L62 = !TB1L46 & (PB1_OPC[7] & UB1L59 # !TB1L19);


--UB1L68 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s024bo:U2|ALUC~2052 at LCCOMB_X14_Y2_N0
UB1L68 = UB1L62 # !PB1_OPC[7] & UB1L65 # !DB1L35;


--FB1_TMPDAT[3] is CPU8051V1:inst|MCU80512:inst3|m3s006bo:U5|TMPDAT[3] at LCFF_X18_Y4_N15
FB1_TMPDAT[3] = DFFEAS(FB1L20, GLOBAL(UC1L2), RST,  ,  ,  ,  ,  ,  );


--DB1L87 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|LEITHER_RET~19 at LCCOMB_X14_Y4_N12
DB1L87 = !PB1_OPC[6] & !PB1_OPC[7] & !TB1L40;


--UB1L71 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s024bo:U2|ALUC~2053 at LCCOMB_X14_Y4_N26
UB1L71 = DB1L87 # UB1L56 & !PB1_OPC[7] & WB1L1;


--UB1L74 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s024bo:U2|ALUC~2054 at LCCOMB_X14_Y2_N6
UB1L74 = UB1L71 # UB1L59 & UB1L47 # !UB1L29;


--RB5L1 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|m3s002bo:U4|P~278 at LCCOMB_X15_Y4_N0
RB5L1 = FB1_TMPDAT[3] & (UB1L68 # !EB1_ACLDAT[3]) # !FB1_TMPDAT[3] & UB1L74 & EB1_ACLDAT[3];


--RB5L4 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|m3s002bo:U4|P~279 at LCCOMB_X15_Y4_N28
RB5L4 = EB1_ACLDAT[3] & (!RB5L1) # !EB1_ACLDAT[3] & (RB5L1 & (UB1L20) # !RB5L1 & UB1_ALUC[0]);


--FB1_TMPDAT[1] is CPU8051V1:inst|MCU80512:inst3|m3s006bo:U5|TMPDAT[1] at LCFF_X17_Y2_N31
FB1_TMPDAT[1] = DFFEAS(FB1L10, GLOBAL(UC1L2), RST,  ,  , FB1_TMPDAT[1],  ,  , FB1L153);


--RB8L1 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|m3s002bo:U2|P~278 at LCCOMB_X14_Y2_N24
RB8L1 = FB1_TMPDAT[1] & (UB1L68 # !EB1_ACLDAT[1]) # !FB1_TMPDAT[1] & UB1L74 & (EB1_ACLDAT[1]);


--RB8L4 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|m3s002bo:U2|P~279 at LCCOMB_X14_Y2_N8
RB8L4 = RB8L1 & (UB1L20 & !EB1_ACLDAT[1]) # !RB8L1 & (UB1_ALUC[0] # EB1_ACLDAT[1]);


--FB1_TMPDAT[0] is CPU8051V1:inst|MCU80512:inst3|m3s006bo:U5|TMPDAT[0] at LCFF_X15_Y3_N9
FB1_TMPDAT[0] = DFFEAS(FB1L5, GLOBAL(UC1L2), RST,  ,  , FB1_TMPDAT[0],  ,  , FB1L153);


--UB1L50 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s024bo:U2|ALUC~2040 at LCCOMB_X15_Y4_N26
UB1L50 = PB1_OPC[5] & (PB1_OPC[3] # PB1_OPC[2]) # !PB1_OPC[5] & !PB1_OPC[4] & (PB1_OPC[3] # PB1_OPC[2]);


--DB1L84 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|LEITHER_RET~18 at LCCOMB_X12_Y4_N24
DB1L84 = !PB1_OPC[7] & !PB1_OPC[6];


--UB1L23 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s024bo:U2|ALUC[4]~2039 at LCCOMB_X15_Y4_N4
UB1L23 = UB1L47 & (PB1_OPC[5] & !PB1_OPC[4] & !PB1_OPC[6] # !PB1_OPC[5] & PB1_OPC[4] & PB1_OPC[6]);


--UB1L26 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s024bo:U2|ALUC[4]~2041 at LCCOMB_X15_Y4_N14
UB1L26 = DB1L80 # UB1L23 # DB1L84 & UB1L50;


--RB1_CO is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|m3s002bo:U1|CO at LCCOMB_X15_Y1_N10
RB1_CO = EB1_ACLDAT[0] & (FB1_TMPDAT[0] & (UB1L26) # !FB1_TMPDAT[0] & !UB1L29);


--FB1_TMPDAT[2] is CPU8051V1:inst|MCU80512:inst3|m3s006bo:U5|TMPDAT[2] at LCFF_X17_Y6_N5
FB1_TMPDAT[2] = DFFEAS(FB1L15, GLOBAL(UC1L2), RST,  ,  , FB1_TMPDAT[2],  ,  , FB1L153);


--RB6L1 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|m3s002bo:U3|P~278 at LCCOMB_X14_Y2_N22
RB6L1 = EB1_ACLDAT[2] & (FB1_TMPDAT[2] & (UB1L68) # !FB1_TMPDAT[2] & UB1L74) # !EB1_ACLDAT[2] & (FB1_TMPDAT[2]);


--RB6L4 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|m3s002bo:U3|P~279 at LCCOMB_X14_Y2_N10
RB6L4 = EB1_ACLDAT[2] & (!RB6L1) # !EB1_ACLDAT[2] & (RB6L1 & (UB1L20) # !RB6L1 & UB1_ALUC[0]);


--CB1L127 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|GEN_LO~785 at LCCOMB_X14_Y2_N30
CB1L127 = EB1_ACLDAT[1] & (FB1_TMPDAT[1] & UB1L26 # !FB1_TMPDAT[1] & (!UB1L29));


--CB1L130 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|GEN_LO~786 at LCCOMB_X14_Y2_N12
CB1L130 = RB6L4 & (CB1L127 # RB1_CO & RB8L4);


--SB1L4 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|m3s041bo:U9|S~1212 at LCCOMB_X15_Y4_N18
SB1L4 = EB1_ACLDAT[2] & (FB1_TMPDAT[2] & UB1L26 # !FB1_TMPDAT[2] & (!UB1L29));


--CB1L10 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|AAF~68 at LCCOMB_X15_Y4_N2
CB1L10 = !PB1_OPC[6] & PB1_OPC[4] & (PB1_OPC[3] # PB1_OPC[2]);


--CB1L13 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|AAF~69 at LCCOMB_X15_Y4_N8
CB1L13 = EB1_ACLDAT[9] & (PB1_OPC[5] $ PB1_OPC[7]);


--CB1L241 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|QCI~0 at LCCOMB_X15_Y4_N24
CB1L241 = UB1L29 & CB1L13 & UB1L26 & CB1L10 # !UB1L29 & (!CB1L10 # !CB1L13);


--RB1L7 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|m3s002bo:U1|P~277 at LCCOMB_X15_Y3_N28
RB1L7 = EB1_ACLDAT[0] & !UB1L74 # !EB1_ACLDAT[0] & (UB1_ALUC[0]);


--RB1L4 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|m3s002bo:U1|P~276 at LCCOMB_X15_Y3_N6
RB1L4 = FB1_TMPDAT[0] & (EB1_ACLDAT[0] & (!UB1L68) # !EB1_ACLDAT[0] & UB1L20);


--RB1L10 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|m3s002bo:U1|P~278 at LCCOMB_X15_Y3_N16
RB1L10 = RB1L4 # RB1L7 & !FB1_TMPDAT[0];


--SB1L7 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|m3s041bo:U9|S~1213 at LCCOMB_X15_Y2_N2
SB1L7 = RB8L4 & RB1L10 & CB1L241 & RB6L4;


--CB1_CBEN is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|CBEN at LCCOMB_X15_Y1_N4
CB1_CBEN = UB1L26 # !UB1L29;


--SB1L10 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|m3s041bo:U9|S~1214 at LCCOMB_X15_Y2_N6
SB1L10 = SB1L7 # CB1_CBEN & (SB1L4 # CB1L130);


--EB1_ACC0 is CPU8051V1:inst|MCU80512:inst3|m3s005bo:U4|ACC0 at LCFF_X15_Y3_N15
EB1_ACC0 = DFFEAS(EB1L4, GLOBAL(UC1L2), RST,  ,  ,  ,  ,  ,  );


--UB1_AJ is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s024bo:U2|AJ at LCCOMB_X18_Y3_N12
UB1_AJ = TB1L10 # TB1L46;


--FB1_TMPDAT[7] is CPU8051V1:inst|MCU80512:inst3|m3s006bo:U5|TMPDAT[7] at LCFF_X18_Y4_N1
FB1_TMPDAT[7] = DFFEAS(FB1L52, GLOBAL(UC1L2), RST,  ,  ,  ,  ,  ,  );


--CB1L100 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|DB~930 at LCCOMB_X17_Y2_N10
CB1L100 = EB1_ACLDAT[7] & (FB1_TMPDAT[7] & (UB1L26) # !FB1_TMPDAT[7] & !UB1L29);


--RB7L1 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|m3s002bo:U8|P~475 at LCCOMB_X17_Y2_N18
RB7L1 = EB1_ACLDAT[7] & (FB1_TMPDAT[7] # !UB1L74) # !EB1_ACLDAT[7] & (UB1_ALUC[0] & !FB1_TMPDAT[7]);


--RB7L4 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|m3s002bo:U8|P~476 at LCCOMB_X15_Y2_N26
RB7L4 = FB1_TMPDAT[7] & (RB7L1 & (!UB1L68) # !RB7L1 & UB1L20) # !FB1_TMPDAT[7] & (RB7L1);


--FB1_TMPDAT[6] is CPU8051V1:inst|MCU80512:inst3|m3s006bo:U5|TMPDAT[6] at LCFF_X17_Y2_N17
FB1_TMPDAT[6] = DFFEAS(FB1L47, GLOBAL(UC1L2), RST,  ,  , FB1_TMPDAT[6],  ,  , FB1L153);


--RB4L1 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|m3s002bo:U7|P~278 at LCCOMB_X17_Y2_N26
RB4L1 = FB1_TMPDAT[6] & (UB1L68 # !EB1_ACLDAT[6]) # !FB1_TMPDAT[6] & EB1_ACLDAT[6] & (UB1L74);


--RB4L4 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|m3s002bo:U7|P~279 at LCCOMB_X17_Y2_N14
RB4L4 = EB1_ACLDAT[6] & (!RB4L1) # !EB1_ACLDAT[6] & (RB4L1 & (UB1L20) # !RB4L1 & UB1_ALUC[0]);


--CB1L106 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|DB~932 at LCCOMB_X17_Y2_N24
CB1L106 = FB1_TMPDAT[6] & (UB1L26) # !FB1_TMPDAT[6] & !UB1L29;


--FB1_TMPDAT[5] is CPU8051V1:inst|MCU80512:inst3|m3s006bo:U5|TMPDAT[5] at LCFF_X17_Y2_N21
FB1_TMPDAT[5] = DFFEAS(FB1L33, GLOBAL(UC1L2), RST,  ,  , FB1_TMPDAT[5],  ,  , FB1L153);


--SB2L4 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|m3s041bo:U10|S~1209 at LCCOMB_X17_Y2_N12
SB2L4 = EB1_ACLDAT[5] & (FB1_TMPDAT[5] & (UB1L26) # !FB1_TMPDAT[5] & !UB1L29);


--RB2L1 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|m3s002bo:U6|P~283 at LCCOMB_X17_Y2_N6
RB2L1 = FB1_TMPDAT[5] & (UB1L68 # !EB1_ACLDAT[5]) # !FB1_TMPDAT[5] & EB1_ACLDAT[5] & (UB1L74);


--RB2L4 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|m3s002bo:U6|P~284 at LCCOMB_X17_Y2_N22
RB2L4 = EB1_ACLDAT[5] & (!RB2L1) # !EB1_ACLDAT[5] & (RB2L1 & (UB1L20) # !RB2L1 & UB1_ALUC[0]);


--FB1_TMPDAT[4] is CPU8051V1:inst|MCU80512:inst3|m3s006bo:U5|TMPDAT[4] at LCFF_X20_Y7_N11
FB1_TMPDAT[4] = DFFEAS(FB1L28, GLOBAL(UC1L2), RST,  ,  ,  ,  ,  ,  );


--RB3_CO is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|m3s002bo:U5|CO at LCCOMB_X17_Y2_N28
RB3_CO = EB1_ACLDAT[4] & (FB1_TMPDAT[4] & (UB1L26) # !FB1_TMPDAT[4] & !UB1L29);


--SB2L7 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|m3s041bo:U10|S~1210 at LCCOMB_X17_Y2_N4
SB2L7 = SB2L4 # RB2L4 & RB3_CO;


--SB2L10 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|m3s041bo:U10|S~1211 at LCCOMB_X17_Y2_N2
SB2L10 = CB1L106 & !EB1_ACLDAT[6] & (!RB4L4 # !SB2L7) # !CB1L106 & (!RB4L4 # !SB2L7);


--RB3L4 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|m3s002bo:U5|P~283 at LCCOMB_X14_Y2_N18
RB3L4 = FB1_TMPDAT[4] & (UB1L68 # !EB1_ACLDAT[4]) # !FB1_TMPDAT[4] & UB1L74 & (EB1_ACLDAT[4]);


--RB3L7 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|m3s002bo:U5|P~284 at LCCOMB_X14_Y2_N14
RB3L7 = EB1_ACLDAT[4] & (!RB3L4) # !EB1_ACLDAT[4] & (RB3L4 & UB1L20 # !RB3L4 & (UB1_ALUC[0]));


--CB1L124 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|GEN_LO~784 at LCCOMB_X15_Y4_N12
CB1L124 = FB1_TMPDAT[3] & UB1L26 # !FB1_TMPDAT[3] & (!UB1L29);


--CB1L61 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|CA~72 at LCCOMB_X15_Y4_N6
CB1L61 = CB1L124 & !EB1_ACLDAT[3] & (!RB5L4 # !SB1L4) # !CB1L124 & (!RB5L4 # !SB1L4);


--CB1L64 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|CA~73 at LCCOMB_X15_Y2_N28
CB1L64 = CB1L61 & (!CB1L130 & !SB1L7 # !RB5L4);


--CB1L103 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|DB~931 at LCCOMB_X15_Y2_N14
CB1L103 = !CB1L64 & RB2L4 & RB4L4 & RB3L7;


--CB1L109 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|DB~933 at LCCOMB_X15_Y2_N8
CB1L109 = CB1L100 # RB7L4 & (CB1L103 # !SB2L10);


--CB1L70 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|CMUX~60 at LCCOMB_X15_Y2_N20
CB1L70 = EB1_ACC0 & (CB1L109 # UB1_AC) # !EB1_ACC0 & UB1_AJ & (CB1L109 # UB1_AC);


--CB1L82 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|CPRDDM[3]~2119 at LCCOMB_X15_Y2_N18
CB1L82 = CB1L70 & (SB1L10 $ (RB5L4)) # !CB1L70 & (EB1_ACLDAT[3]);


--UB1L92 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s024bo:U2|AP~27 at LCCOMB_X13_Y2_N12
UB1L92 = !PB1_OPC[5] & !TB1L43 & !PB1_OPC[6] & !PB1_OPC[7];


--UB1_ALUC[6] is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s024bo:U2|ALUC[6] at LCCOMB_X13_Y2_N16
UB1_ALUC[6] = UB1L92 # !TB1L46 & (!TB1L16 # !TB1L10);


--UB1L35 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s024bo:U2|ALUC[7]~2055 at LCCOMB_X13_Y2_N26
UB1L35 = !TB1L46 & PB1_OPC[7] & !PB1_OPC[5] & !PB1_OPC[4];


--UB1L38 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s024bo:U2|ALUC[7]~2056 at LCCOMB_X13_Y2_N20
UB1L38 = UB1L35 # DB1L84 & !TB1L43 & PB1_OPC[5];


--SB2L13 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|m3s041bo:U10|S~1212 at LCCOMB_X15_Y2_N22
SB2L13 = RB3L7 & RB2L4 & !CB1L64 & CB1_CBEN;


--SB2L19 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|m3s041bo:U10|S~1214 at LCCOMB_X17_Y2_N8
SB2L19 = SB2L13 # SB2L7 & (UB1L26 # !UB1L29);


--CB1L91 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|CPRDDM[6]~2118 at LCCOMB_X18_Y2_N16
CB1L91 = CB1L70 & (RB4L4 $ (SB2L19)) # !CB1L70 & (EB1_ACLDAT[6]);


--SB2L16 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|m3s041bo:U10|S~1213 at LCCOMB_X15_Y2_N16
SB2L16 = SB2L10 & SB2L13 & RB4L4 # !SB2L10 & (CB1_CBEN # SB2L13 & RB4L4);


--CB1L94 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|CPRDDM[7]~2117 at LCCOMB_X15_Y2_N0
CB1L94 = CB1L70 & (SB2L16 $ RB7L4) # !CB1L70 & EB1_ACLDAT[7];


--CB1L148 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|Mux0~12 at LCCOMB_X19_Y2_N4
CB1L148 = UB1_ALUC[6] & UB1L38 # !UB1_ALUC[6] & (UB1L38 & (CB1L91) # !UB1L38 & CB1L94);


--CB1L73 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|CPRDDM[0]~2116 at LCCOMB_X15_Y2_N12
CB1L73 = CB1L70 & (RB1L10 $ CB1L241) # !CB1L70 & (EB1_ACLDAT[0]);


--UB1_ALUC[15] is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s024bo:U2|ALUC[15] at LCCOMB_X17_Y3_N18
UB1_ALUC[15] = DB1L84 & !TB1L43 & PB1_OPC[4] # !UB1_AJ;


--CB1_CARI is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|CARI at LCCOMB_X17_Y3_N4
CB1_CARI = CB1L109 $ (!UB1L29 & (TB1L46 # !TB1L31));


--CB1L142 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|LOCALD~124 at LCCOMB_X17_Y3_N16
CB1L142 = UB1_AJ & EB1_ACLDAT[9] # !UB1_AJ & (CB1_CARI & EB1_ACC0);


--CB1L145 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|LOCALD~125 at LCCOMB_X19_Y2_N2
CB1L145 = UB1_ALUC[15] & (CB1L142) # !UB1_ALUC[15] & CB1L73;


--CB1L151 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|Mux0~13 at LCCOMB_X19_Y2_N12
CB1L151 = UB1_ALUC[6] & (CB1L148 & CB1L82 # !CB1L148 & (CB1L145)) # !UB1_ALUC[6] & (CB1L148);


--JB1L39 is CPU8051V1:inst|MCU80512:inst3|m3s010bo:U8|ADDR_16BIT_LOW[7]~COMBOUT at LCCOMB_X19_Y2_N22
JB1L39 = CB1L217 & CB1L43 # !CB1L217 & (CB1L151);


--HB1L489 is CPU8051V1:inst|MCU80512:inst3|m3s008bo:U7|RAMDI~587 at LCCOMB_X20_Y4_N28
HB1L489 = HB1L465 & (!YB1_REGADD[9]) # !HB1L465 & (YB1_REGADD[9] & JB1_STACK_DATA[15] # !YB1_REGADD[9] & (JB1L39));


--HB1L492 is CPU8051V1:inst|MCU80512:inst3|m3s008bo:U7|RAMDI~588 at LCCOMB_X20_Y4_N22
HB1L492 = HB1L465 & (HB1L489 & P1_IMMDAT[7] # !HB1L489 & (JB1_STACK_DATA[7])) # !HB1L465 & (HB1L489);


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