mcu8951.fit.eqn

Alera 的8051 IP core的示例文件5个

--W1_STX.ST12 is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|MEALY1:inst14|STX.ST12 at LCFF_X2_Y6_N29
W1_STX.ST12 = DFFEAS(W1L32, GLOBAL(R1L38), !R1_inst28,  ,  ,  ,  ,  ,  );


--W1L72 is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|MEALY1:inst14|Selector14~15 at LCCOMB_X2_Y6_N0
W1L72 = !MT & !R1_inst10 & !R1_inst5 & W1_STX.ST12;


--W1L69 is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|MEALY1:inst14|Selector0~23 at LCCOMB_X2_Y6_N4
W1L69 = W1_STX.ST12 # !MT & !R1_inst10 & !R1_inst5;


--W1_Q is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|MEALY1:inst14|Q at LCCOMB_X2_Y6_N8
W1_Q = W1L69 & (W1L72) # !W1L69 & W1_Q;


--ZB1_REG_HI_NIBBLE[7] is CPU8051V1:inst|MCU80512:inst3|m3s008bo:U7|m3s009bo:U1|REG_HI_NIBBLE[7] at LCFF_X18_Y4_N19
ZB1_REG_HI_NIBBLE[7] = DFFEAS(ZB1L19, GLOBAL(UC1L2), RST,  ,  , ZB1_REG_HI_NIBBLE[7],  ,  , HB1L840);


--TB1L19 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s022bo:U1|HIDEC~21 at LCCOMB_X13_Y4_N6
TB1L19 = PB1_OPC[5] # !PB1_OPC[4] # !PB1_OPC[6] # !PB1_OPC[7];


--VB1L24 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s033bo:U3|ACCADD[4]~788 at LCCOMB_X13_Y5_N14
VB1L24 = PB1_OPC[1] & PB1_OPC[2] & !PB1_OPC[3] & !TB1L19;


--TB1L4 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s022bo:U1|HIDEC~7 at LCCOMB_X12_Y6_N24
TB1L4 = PB1_OPC[7] # !PB1_OPC[4] # !PB1_OPC[5] # !PB1_OPC[6];


--TB1L40 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s022bo:U1|LODEC~5 at LCCOMB_X14_Y4_N0
TB1L40 = PB1_OPC[2] # PB1_OPC[0] # PB1_OPC[3] # !PB1_OPC[1];


--TB1L37 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s022bo:U1|LODEC~3 at LCCOMB_X13_Y6_N14
TB1L37 = PB1_OPC[1] # PB1_OPC[2] # PB1_OPC[3] # !PB1_OPC[0];


--TB1L1 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s022bo:U1|HIDEC~1 at LCCOMB_X12_Y6_N2
TB1L1 = PB1_OPC[7] # PB1_OPC[5] # PB1_OPC[6] # !PB1_OPC[4];


--YB1_REGADD[9] is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s035bo:U6|REGADD[9] at LCCOMB_X12_Y6_N4
YB1_REGADD[9] = PB1_OPC[4] & (!TB1L1 & !TB1L40 # !TB1L37) # !PB1_OPC[4] & !TB1L1 & (!TB1L40);


--WB1L7 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s032bo:U4|AF~29 at LCCOMB_X12_Y4_N8
WB1L7 = !PB1_OPC[3] & (!PB1_OPC[1] & !PB1_OPC[0] # !PB1_OPC[2]);


--HB1L468 is CPU8051V1:inst|MCU80512:inst3|m3s008bo:U7|RAMDI[4]~589 at LCCOMB_X19_Y3_N12
HB1L468 = YB1_REGADD[9] # !WB1L7 & !TB1L4 # !VB1L24;


--JB1_STACK_DATA[7] is CPU8051V1:inst|MCU80512:inst3|m3s010bo:U8|STACK_DATA[7] at LCFF_X20_Y4_N5
JB1_STACK_DATA[7] = DFFEAS(JB1L581, GLOBAL(UC1L2),  ,  ,  ,  ,  ,  ,  );


--P1_IMMDAT[7] is CPU8051V1:inst|MCU80512:inst3|IMMDAT[7] at LCFF_X17_Y7_N9
P1_IMMDAT[7] = DFFEAS(P1L77, GLOBAL(UC1L2),  ,  ,  , P1_IMMDAT[7],  ,  , P1L34);


--ZB1_STACK_MUX is CPU8051V1:inst|MCU80512:inst3|m3s008bo:U7|m3s009bo:U1|STACK_MUX at LCFF_X14_Y3_N25
ZB1_STACK_MUX = DFFEAS(ZB1L25, GLOBAL(UC1L2), RST,  ,  , ZB1_STACK_MUX,  ,  , !BB1_LDV2CK2);


--HB1L465 is CPU8051V1:inst|MCU80512:inst3|m3s008bo:U7|RAMDI[4]~586 at LCCOMB_X19_Y3_N10
HB1L465 = YB1_REGADD[9] & !ZB1_STACK_MUX # !YB1_REGADD[9] & (!WB1L7 & !TB1L4);


--JB1_STACK_DATA[15] is CPU8051V1:inst|MCU80512:inst3|m3s010bo:U8|STACK_DATA[15] at LCFF_X20_Y4_N27
JB1_STACK_DATA[15] = DFFEAS(JB1L621, GLOBAL(UC1L2),  ,  ,  ,  ,  ,  ,  );


--TB1L16 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s022bo:U1|HIDEC~18 at LCCOMB_X13_Y2_N0
TB1L16 = PB1_OPC[5] # PB1_OPC[4] # !PB1_OPC[7] # !PB1_OPC[6];


--CB1L49 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|BC~1360 at LCCOMB_X13_Y3_N26
CB1L49 = PB1_OPC[2] # PB1_OPC[3] # TB1L16 # !PB1_OPC[1];


--EB1_ACLDAT[9] is CPU8051V1:inst|MCU80512:inst3|m3s005bo:U4|ACLDAT[9] at LCFF_X15_Y3_N1
EB1_ACLDAT[9] = DFFEAS(EB1L74, GLOBAL(UC1L2), RST,  ,  ,  ,  ,  ,  );


--TB1L10 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s022bo:U1|HIDEC~13 at LCCOMB_X13_Y4_N18
TB1L10 = PB1_OPC[6] # PB1_OPC[4] # !PB1_OPC[5] # !PB1_OPC[7];


--HB1_BIT_POSN[2] is CPU8051V1:inst|MCU80512:inst3|m3s008bo:U7|BIT_POSN[2] at LCFF_X14_Y7_N13
HB1_BIT_POSN[2] = DFFEAS(HB1L17, GLOBAL(UC1L2), RST,  ,  , HB1_BIT_POSN[2],  ,  , HB1L849);


--EB1_ACLDAT[3] is CPU8051V1:inst|MCU80512:inst3|m3s005bo:U4|ACLDAT[3] at LCFF_X19_Y5_N21
EB1_ACLDAT[3] = DFFEAS(EB1L43, GLOBAL(UC1L2), RST,  ,  ,  ,  ,  ,  );


--EB1_ACLDAT[2] is CPU8051V1:inst|MCU80512:inst3|m3s005bo:U4|ACLDAT[2] at LCFF_X18_Y6_N1
EB1_ACLDAT[2] = DFFEAS(EB1L38, GLOBAL(UC1L2), RST,  ,  ,  ,  ,  ,  );


--HB1_BIT_POSN[1] is CPU8051V1:inst|MCU80512:inst3|m3s008bo:U7|BIT_POSN[1] at LCFF_X14_Y7_N19
HB1_BIT_POSN[1] = DFFEAS(HB1L12, GLOBAL(UC1L2), RST,  ,  , HB1_BIT_POSN[1],  ,  , HB1L849);


--EB1_ACLDAT[1] is CPU8051V1:inst|MCU80512:inst3|m3s005bo:U4|ACLDAT[1] at LCFF_X18_Y6_N7
EB1_ACLDAT[1] = DFFEAS(EB1L33, GLOBAL(UC1L2), RST,  ,  ,  ,  ,  ,  );


--EB1_ACLDAT[0] is CPU8051V1:inst|MCU80512:inst3|m3s005bo:U4|ACLDAT[0] at LCFF_X15_Y3_N19
EB1_ACLDAT[0] = DFFEAS(EB1L28, GLOBAL(UC1L2), RST,  ,  ,  ,  ,  ,  );


--HB1_BIT_POSN[0] is CPU8051V1:inst|MCU80512:inst3|m3s008bo:U7|BIT_POSN[0] at LCFF_X14_Y7_N7
HB1_BIT_POSN[0] = DFFEAS(HB1L7, GLOBAL(UC1L2), RST,  ,  , HB1_BIT_POSN[0],  ,  , HB1L849);


--CB1L208 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|Mux9~32 at LCCOMB_X18_Y1_N4
CB1L208 = HB1_BIT_POSN[0] & (EB1_ACLDAT[1] # HB1_BIT_POSN[1]) # !HB1_BIT_POSN[0] & EB1_ACLDAT[0] & (!HB1_BIT_POSN[1]);


--CB1L211 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|Mux9~33 at LCCOMB_X18_Y1_N12
CB1L211 = CB1L208 & (EB1_ACLDAT[3] # !HB1_BIT_POSN[1]) # !CB1L208 & EB1_ACLDAT[2] & (HB1_BIT_POSN[1]);


--EB1_ACLDAT[5] is CPU8051V1:inst|MCU80512:inst3|m3s005bo:U4|ACLDAT[5] at LCFF_X18_Y6_N27
EB1_ACLDAT[5] = DFFEAS(EB1L53, GLOBAL(UC1L2), RST,  ,  ,  ,  ,  ,  );


--EB1_ACLDAT[7] is CPU8051V1:inst|MCU80512:inst3|m3s005bo:U4|ACLDAT[7] at LCFF_X18_Y4_N21
EB1_ACLDAT[7] = DFFEAS(EB1L69, GLOBAL(UC1L2), RST,  ,  ,  ,  ,  ,  );


--EB1_ACLDAT[4] is CPU8051V1:inst|MCU80512:inst3|m3s005bo:U4|ACLDAT[4] at LCFF_X18_Y6_N13
EB1_ACLDAT[4] = DFFEAS(EB1L48, GLOBAL(UC1L2), RST,  ,  ,  ,  ,  ,  );


--EB1_ACLDAT[6] is CPU8051V1:inst|MCU80512:inst3|m3s005bo:U4|ACLDAT[6] at LCFF_X18_Y6_N21
EB1_ACLDAT[6] = DFFEAS(EB1L64, GLOBAL(UC1L2), RST,  ,  ,  ,  ,  ,  );


--CB1L202 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|Mux9~30 at LCCOMB_X18_Y1_N16
CB1L202 = HB1_BIT_POSN[0] & (HB1_BIT_POSN[1]) # !HB1_BIT_POSN[0] & (HB1_BIT_POSN[1] & (EB1_ACLDAT[6]) # !HB1_BIT_POSN[1] & EB1_ACLDAT[4]);


--CB1L205 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|Mux9~31 at LCCOMB_X18_Y1_N28
CB1L205 = CB1L202 & (EB1_ACLDAT[7] # !HB1_BIT_POSN[0]) # !CB1L202 & EB1_ACLDAT[5] & (HB1_BIT_POSN[0]);


--CB1L214 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|Mux9~34 at LCCOMB_X18_Y1_N18
CB1L214 = HB1_BIT_POSN[2] & (CB1L205) # !HB1_BIT_POSN[2] & CB1L211;


--TB1L31 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s022bo:U1|HIDEC~959 at LCCOMB_X13_Y4_N24
TB1L31 = PB1_OPC[7] & !PB1_OPC[6] & !PB1_OPC[5] & !PB1_OPC[4];


--CB1L19 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|BC~1350 at LCCOMB_X12_Y3_N4
CB1L19 = !CB1L214 & (TB1L40 # TB1L10 & !TB1L31);


--TB1L13 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s022bo:U1|HIDEC~15 at LCCOMB_X12_Y4_N4
TB1L13 = PB1_OPC[6] # !PB1_OPC[5] # !PB1_OPC[7] # !PB1_OPC[4];


--TB1L43 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s022bo:U1|LODEC~7 at LCCOMB_X14_Y4_N22
TB1L43 = PB1_OPC[2] # PB1_OPC[3] # !PB1_OPC[0] # !PB1_OPC[1];


--UB1_AV is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s024bo:U2|AV at LCCOMB_X12_Y3_N28
UB1_AV = TB1L43 # TB1L13;


--WB1L1 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s032bo:U4|AC~88 at LCCOMB_X14_Y4_N10
WB1L1 = PB1_OPC[4] & !PB1_OPC[5];


--TB1L34 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s022bo:U1|LODEC~1 at LCCOMB_X13_Y5_N2
TB1L34 = PB1_OPC[1] # PB1_OPC[0] # PB1_OPC[3] # PB1_OPC[2];


--UB1_JBC is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s024bo:U2|JBC at LCCOMB_X14_Y8_N18
UB1_JBC = PB1_OPC[7] # PB1_OPC[6] # TB1L34 # !WB1L1;


--TB1L46 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s022bo:U1|LODEC~10 at LCCOMB_X14_Y4_N24
TB1L46 = PB1_OPC[1] # PB1_OPC[0] # PB1_OPC[3] # !PB1_OPC[2];


--UB1L44 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s024bo:U2|ALUC~2037 at LCCOMB_X14_Y5_N24
UB1L44 = !TB1L46 & !PB1_OPC[6] & PB1_OPC[7] & !PB1_OPC[4];


--CB1L16 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|BC~1349 at LCCOMB_X12_Y3_N12
CB1L16 = !UB1L44 & EB1_ACLDAT[9] & UB1_JBC & UB1_AV;


--CB1L22 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|BC~1351 at LCCOMB_X12_Y3_N26
CB1L22 = CB1L214 & (TB1L13 # TB1L34 & TB1L40);


--CB1L25 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|BC~1352 at LCCOMB_X12_Y3_N20
CB1L25 = CB1L16 & (CB1L22 # CB1L19);


--CB1L31 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|BC~1354 at LCCOMB_X12_Y3_N10
CB1L31 = !TB1L40 & (!TB1L4 # !TB1L19 # !TB1L10);


--CB1L34 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|BC~1355 at LCCOMB_X13_Y3_N16
CB1L34 = PB1_OPC[7] & PB1_OPC[4] & (PB1_OPC[5] $ PB1_OPC[6]);


--CB1L37 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|BC~1356 at LCCOMB_X12_Y3_N8
CB1L37 = CB1L34 & (!TB1L10 & !TB1L34 # !TB1L40) # !CB1L34 & !TB1L10 & !TB1L34;


--CB1L28 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|BC~1353 at LCCOMB_X12_Y3_N22
CB1L28 = !TB1L43 & (!TB1L13 # !TB1L19);


--CB1L40 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|BC~1357 at LCCOMB_X12_Y3_N30
CB1L40 = CB1L28 # CB1L214 & (CB1L31) # !CB1L214 & CB1L37;


--CB1L43 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|BC~1358 at LCCOMB_X12_Y3_N16
CB1L43 = CB1L49 & (CB1L25 # !EB1_ACLDAT[9] & CB1L40) # !CB1L49 & !EB1_ACLDAT[9] & (CB1L40);


--YB1L26 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s035bo:U6|REGADD[8]~1189 at LCCOMB_X10_Y4_N8
YB1L26 = PB1_OPC[5] # !PB1_OPC[7] # !PB1_OPC[6];


--UB1L86 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s024bo:U2|ALUC~2060 at LCCOMB_X12_Y6_N6
UB1L86 = PB1_OPC[5] & PB1_OPC[4] & (PB1_OPC[7] $ PB1_OPC[6]) # !PB1_OPC[5] & PB1_OPC[7] & !PB1_OPC[6];


--UB1L89 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s024bo:U2|ALUC~2061 at LCCOMB_X12_Y6_N20
UB1L89 = !TB1L40 & (UB1L86 # !YB1L26) # !UB1_JBC;


--CB1L217 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|Mux17~112 at LCCOMB_X18_Y1_N0
CB1L217 = HB1_BIT_POSN[0] & HB1_BIT_POSN[1] & HB1_BIT_POSN[2] & UB1L89;


--UB1L53 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s024bo:U2|ALUC~2042 at LCCOMB_X13_Y4_N16
UB1L53 = !PB1_OPC[6] & PB1_OPC[4] & (PB1_OPC[7] # !PB1_OPC[5]);


--TB1L49 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s022bo:U1|LODEC~13 at LCCOMB_X14_Y4_N8
TB1L49 = PB1_OPC[1] # PB1_OPC[3] # !PB1_OPC[0] # !PB1_OPC[2];


--XB1L26 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s034bo:U5|PCADD[10]~1163 at LCCOMB_X14_Y2_N4
XB1L26 = TB1L19 # TB1L49 & !PB1_OPC[3];


--UB1_AC is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s024bo:U2|AC at LCCOMB_X14_Y2_N2
UB1_AC = TB1L46 # !TB1L31;


--UB1L29 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s024bo:U2|ALUC[5]~2043 at LCCOMB_X14_Y2_N20
UB1L29 = UB1_AC & XB1L26 & (DB1L7 # !UB1L53);


--UB1_ALUC[0] is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s024bo:U2|ALUC[0] at LCCOMB_X14_Y2_N16
UB1_ALUC[0] = TB1L28 & !TB1L46 & WB1L4 # !UB1L29;


--UB1L17 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s024bo:U2|ALUC[1]~2047 at LCCOMB_X15_Y4_N30
UB1L17 = PB1_OPC[6] & PB1_OPC[4] # !PB1_OPC[6] & !PB1_OPC[4] & PB1_OPC[5];


--UB1L47 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s024bo:U2|ALUC~2038 at LCCOMB_X15_Y4_N10
UB1L47 = PB1_OPC[7] & !TB1L46;


--DB1L77 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|IMMB4~68 at LCCOMB_X13_Y4_N30
DB1L77 = PB1_OPC[7] & (PB1_OPC[6] # PB1_OPC[5]) # !PB1_OPC[7] & (!PB1_OPC[4] # !PB1_OPC[5] # !PB1_OPC[6]);


--DB1L80 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|IMMB4~69 at LCCOMB_X15_Y4_N22
DB1L80 = !TB1L43 & (!TB1L10 # !DB1L77);


--UB1L56 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s024bo:U2|ALUC~2045 at LCCOMB_X14_Y4_N2
UB1L56 = PB1_OPC[6] & (PB1_OPC[2] # PB1_OPC[1] # PB1_OPC[3]);


--UB1L11 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s024bo:U2|ALUC[1]~2044 at LCCOMB_X14_Y4_N4
UB1L11 = !PB1_OPC[6] & (!DB1L7 & !WB1L1 # !TB1L40);


--UB1L14 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s024bo:U2|ALUC[1]~2046 at LCCOMB_X15_Y4_N20
UB1L14 = !PB1_OPC[7] & (UB1L11 # !PB1_OPC[4] & UB1L56);


--UB1L20 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s024bo:U2|ALUC[1]~2048 at LCCOMB_X15_Y4_N16
UB1L20 = DB1L80 # UB1L14 # UB1L47 & UB1L17;


--CB1L7 is CPU8051V1:inst|MCU80512:inst3|m3s003bo:U2|AAF~67 at LCCOMB_X14_Y4_N16
CB1L7 = !PB1_OPC[6] & (PB1_OPC[2] # PB1_OPC[3]);


--UB1L65 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s024bo:U2|ALUC~2051 at LCCOMB_X14_Y4_N30
UB1L65 = PB1_OPC[4] & (CB1L7 & PB1_OPC[5]) # !PB1_OPC[4] & (CB1L7 # UB1L56 & PB1_OPC[5]);


--DB1L35 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|GOCYC2~381 at LCCOMB_X13_Y4_N0
DB1L35 = TB1L10 & (TB1L43 # DB1L77) # !TB1L10 & TB1L43 & TB1L46;


--UB1L59 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s024bo:U2|ALUC~2049 at LCCOMB_X13_Y4_N22
UB1L59 = PB1_OPC[5] & PB1_OPC[6];