mcu8951.fit.eqn

Alera 的8051 IP core的示例文件5个

--QB1L200 is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|RB8control~34 at LCCOMB_X21_Y12_N18
QB1L200 = !BB1_LDV2CK1 & (QB1L169 & (QB1_RXC9) # !QB1L169 & BB1_STATE12);


--QB1_MAJQ2 is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|MAJQ2 at LCFF_X22_Y12_N31
QB1_MAJQ2 = DFFEAS(QB1L162, GLOBAL(UC1L2),  ,  ,  ,  ,  ,  ,  );


--QB1_MAJQ1 is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|MAJQ1 at LCFF_X22_Y12_N13
QB1_MAJQ1 = DFFEAS(QB1L157, GLOBAL(UC1L2),  ,  ,  ,  ,  ,  ,  );


--QB1L153 is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|MAJOUT~87 at LCCOMB_X22_Y12_N10
QB1L153 = QB1_MAJQ1 & (QB1_RX_DIN # QB1_MAJQ2) # !QB1_MAJQ1 & QB1_RX_DIN & QB1_MAJQ2;


--QB1_FSREJ is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|FSREJ at LCFF_X22_Y11_N3
QB1_FSREJ = DFFEAS(QB1L69, GLOBAL(UC1L2),  ,  ,  ,  ,  ,  ,  );


--QB1_DELCLRRCV is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|DELCLRRCV at LCFF_X22_Y11_N7
QB1_DELCLRRCV = DFFEAS(QB1L33, GLOBAL(UC1L2),  ,  ,  ,  ,  , !P1_CLEAR,  );


--JC1_DAT[0] is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|m3s031bo:U10|DAT[0] at LCFF_X24_Y11_N17
JC1_DAT[0] = DFFEAS(JC1L5, GLOBAL(UC1L2),  ,  ,  ,  ,  ,  ,  );


--QB1L205 is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|RCV~527 at LCCOMB_X22_Y11_N24
QB1L205 = QB1_L_SCON[7] & (!QB1_DELCLRRCV) # !QB1_L_SCON[7] & JC1_DAT[0];


--QB1L208 is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|RCV~528 at LCCOMB_X22_Y11_N22
QB1L208 = QB1L205 & (QB1_FSREJ # !QB1L169 # !QB1L153);


--QB1L211 is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|RCV~529 at LCCOMB_X22_Y11_N28
QB1L211 = QB1L200 & (QB1L208 & QB1_RCV # !QB1_SWREC) # !QB1L200 & (QB1_RCV);


--QB1L215 is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|RCV~ICOMBOUT at LCCOMB_X22_Y12_N16
QB1L215 = P1_CLEAR & QB1_L_SCON[4] & (QB1L211 # QB1L47);


--AC1L4 is CPU8051V1:inst|MCU80512:inst3|m3s008bo:U7|m3s039bo:U2|A001~9 at LCCOMB_X22_Y8_N8
AC1L4 = !HB1_L_FA[1] & HB1_L_FA[0] & !HB1_L_FA[2];


--AC1_SFRW[11] is CPU8051V1:inst|MCU80512:inst3|m3s008bo:U7|m3s039bo:U2|SFRW[11] at LCCOMB_X21_Y9_N30
AC1_SFRW[11] = HB1_L_FA[3] & AC1L4 & HB1_L_FA[4] & AC1L56;


--QB1L342 is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|TSHIFT_EN~1 at LCCOMB_X20_Y11_N4
QB1L342 = QB1L394 & !BB1_LDV2CK1 & QB1_DATAEN;


--QB1_NEWDATA is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|NEWDATA at LCFF_X20_Y11_N11
QB1_NEWDATA = DFFEAS(QB1L175, GLOBAL(UC1L2),  ,  ,  ,  ,  ,  ,  );


--HC1_DAT[1] is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|m3s030bo:U9|DAT[1] at LCFF_X20_Y11_N27
HC1_DAT[1] = DFFEAS(HC1L10, GLOBAL(UC1L2),  ,  ,  ,  ,  , !P1_CLEAR,  );


--HB1_RAMDI[0] is CPU8051V1:inst|MCU80512:inst3|m3s008bo:U7|RAMDI[0] at LCFF_X21_Y4_N25
HB1_RAMDI[0] = DFFEAS(HB1L453, GLOBAL(UC1L2), RST,  ,  , HB1_RAMDI[0],  ,  , !BB1_STATD[6]);


--HC1L42 is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|m3s030bo:U9|DAT~138 at LCCOMB_X20_Y11_N0
HC1L42 = QB1_NEWDATA & (HB1_RAMDI[0]) # !QB1_NEWDATA & HC1_DAT[1];


--HC1L5 is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|m3s030bo:U9|DAT[0]~ICOMBOUT at LCCOMB_X20_Y11_N14
HC1L5 = AC1_SFRW[11] & (HC1L42) # !AC1_SFRW[11] & (QB1L342 & (HC1L42) # !QB1L342 & HC1_DAT[0]);


--QB1L24 is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|DATAEN~184 at LCCOMB_X21_Y11_N20
QB1L24 = QB1L394 & !BB1_LDV2CK1 & (QB1_TSEND # !QB1L169);


--QB1L28 is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|DATAEN~ICOMBOUT at LCCOMB_X21_Y11_N4
QB1L28 = !QB1_Q6 & !QB1L400 & (QB1L24 # QB1_DATAEN);


--QB1L368 is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|TXLASTBIT~301 at LCCOMB_X21_Y11_N30
QB1L368 = P1_CLEAR & !QB1_Q6;


--HC1_DAT[5] is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|m3s030bo:U9|DAT[5] at LCFF_X20_Y10_N29
HC1_DAT[5] = DFFEAS(HC1L30, GLOBAL(UC1L2),  ,  ,  ,  ,  , !P1_CLEAR,  );


--HC1_DAT[6] is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|m3s030bo:U9|DAT[6] at LCFF_X20_Y10_N19
HC1_DAT[6] = DFFEAS(HC1L35, GLOBAL(UC1L2),  ,  ,  ,  ,  , !P1_CLEAR,  );


--HC1_DAT[4] is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|m3s030bo:U9|DAT[4] at LCFF_X20_Y10_N15
HC1_DAT[4] = DFFEAS(HC1L25, GLOBAL(UC1L2),  ,  ,  ,  ,  , !P1_CLEAR,  );


--HC1_DAT[3] is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|m3s030bo:U9|DAT[3] at LCFF_X20_Y10_N21
HC1_DAT[3] = DFFEAS(HC1L20, GLOBAL(UC1L2),  ,  ,  ,  ,  , !P1_CLEAR,  );


--QB1L374 is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|TXLASTBIT~303 at LCCOMB_X20_Y10_N30
QB1L374 = !HC1_DAT[3] & !HC1_DAT[5] & !HC1_DAT[4] & !HC1_DAT[6];


--HC1_DAT[2] is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|m3s030bo:U9|DAT[2] at LCFF_X20_Y11_N7
HC1_DAT[2] = DFFEAS(HC1L15, GLOBAL(UC1L2),  ,  ,  ,  ,  , !P1_CLEAR,  );


--QB1_TSHIFT_IN is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|TSHIFT_IN at LCFF_X20_Y11_N9
QB1_TSHIFT_IN = DFFEAS(QB1L354, GLOBAL(UC1L2),  ,  ,  ,  ,  , !P1_CLEAR,  );


--QB1_TXSTOPBIT is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|TXSTOPBIT at LCFF_X21_Y11_N13
QB1_TXSTOPBIT = DFFEAS(QB1L389, GLOBAL(UC1L2),  ,  ,  ,  ,  ,  ,  );


--QB1L371 is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|TXLASTBIT~302 at LCCOMB_X20_Y11_N12
QB1L371 = !QB1_TSHIFT_IN & !QB1_TXSTOPBIT & QB1_TSEND & !HC1_DAT[2];


--HC1_DAT[7] is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|m3s030bo:U9|DAT[7] at LCFF_X20_Y10_N1
HC1_DAT[7] = DFFEAS(HC1L40, GLOBAL(UC1L2),  ,  ,  ,  ,  , !P1_CLEAR,  );


--QB1L397 is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|setlastbit~119 at LCCOMB_X20_Y11_N20
QB1L397 = BB1_LDV2CK1 & QB1L394;


--QB1L377 is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|TXLASTBIT~304 at LCCOMB_X20_Y11_N2
QB1L377 = QB1L371 & QB1L374 & QB1L397 & !HC1_DAT[7];


--QB1L381 is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|TXLASTBIT~ICOMBOUT at LCCOMB_X20_Y11_N30
QB1L381 = QB1L368 & (QB1L377 # !QB1L397 & QB1_TXLASTBIT);


--HB1_RAMDI[1] is CPU8051V1:inst|MCU80512:inst3|m3s008bo:U7|RAMDI[1] at LCFF_X21_Y4_N9
HB1_RAMDI[1] = DFFEAS(HB1L456, GLOBAL(UC1L2), RST,  ,  , HB1_RAMDI[1],  ,  , !BB1_STATD[6]);


--LB1L342 is CPU8051V1:inst|MCU80512:inst3|m3s018bo:U10|PORT3_SFR[1]~ICOMBOUT at LCCOMB_X17_Y6_N16
LB1L342 = LB1L356 & (HB1L305 & !HB1_RAMDI[1] # !HB1L305 & (LB1_PORT3_SFR[1])) # !LB1L356 & (LB1_PORT3_SFR[1]);


--LB1L337 is CPU8051V1:inst|MCU80512:inst3|m3s018bo:U10|PORT3_SFR[0]~ICOMBOUT at LCCOMB_X21_Y7_N18
LB1L337 = HB1L305 & (LB1L356 & (!HB1_RAMDI[0]) # !LB1L356 & LB1_PORT3_SFR[0]) # !HB1L305 & (LB1_PORT3_SFR[0]);


--LB1_PORT1_SFR[4] is CPU8051V1:inst|MCU80512:inst3|m3s018bo:U10|PORT1_SFR[4] at LCFF_X20_Y8_N11
LB1_PORT1_SFR[4] = DFFEAS(LB1L272, GLOBAL(UC1L2), RST,  ,  ,  ,  ,  ,  );


--LB1_PORT1_SFR[5] is CPU8051V1:inst|MCU80512:inst3|m3s018bo:U10|PORT1_SFR[5] at LCFF_X21_Y8_N25
LB1_PORT1_SFR[5] = DFFEAS(LB1L280, GLOBAL(UC1L2), RST,  ,  ,  ,  ,  ,  );


--LB1_PORT1_SFR[6] is CPU8051V1:inst|MCU80512:inst3|m3s018bo:U10|PORT1_SFR[6] at LCFF_X20_Y8_N13
LB1_PORT1_SFR[6] = DFFEAS(LB1L285, GLOBAL(UC1L2), RST,  ,  ,  ,  ,  ,  );


--LB1_PORT1_SFR[7] is CPU8051V1:inst|MCU80512:inst3|m3s018bo:U10|PORT1_SFR[7] at LCFF_X20_Y8_N19
LB1_PORT1_SFR[7] = DFFEAS(LB1L290, GLOBAL(UC1L2), RST,  ,  ,  ,  ,  ,  );


--V1_CQI[9] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|CNT32:inst6|CQI[9] at LCFF_X1_Y5_N27
V1_CQI[9] = DFFEAS(V1L51, GLOBAL(B1L11),  ,  ,  ,  ,  ,  ,  );


--AB1L50 is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|RTYY:inst2|lpm_shiftreg:lpm_shiftreg_component|dffs[9]~ICOMBOUT at LCCOMB_X2_Y5_N28
AB1L50 = S1_inst & (V1_CQI[9]) # !S1_inst & AB1_dffs[8];


--V1_CQI[6] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|CNT32:inst6|CQI[6] at LCFF_X1_Y5_N21
V1_CQI[6] = DFFEAS(V1L36, GLOBAL(B1L11),  ,  ,  ,  ,  ,  ,  );


--AB1_dffs[5] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|RTYY:inst2|lpm_shiftreg:lpm_shiftreg_component|dffs[5] at LCFF_X2_Y5_N23
AB1_dffs[5] = DFFEAS(AB1L30, GLOBAL(R1L12),  ,  ,  ,  ,  ,  ,  );


--AB1L35 is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|RTYY:inst2|lpm_shiftreg:lpm_shiftreg_component|dffs[6]~ICOMBOUT at LCCOMB_X2_Y5_N18
AB1L35 = S1_inst & V1_CQI[6] # !S1_inst & (AB1_dffs[5]);


--V1_CQI[3] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|CNT32:inst6|CQI[3] at LCFF_X1_Y5_N15
V1_CQI[3] = DFFEAS(V1L21, GLOBAL(B1L11),  ,  ,  ,  ,  ,  ,  );


--AB1_dffs[2] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|RTYY:inst2|lpm_shiftreg:lpm_shiftreg_component|dffs[2] at LCFF_X2_Y5_N25
AB1_dffs[2] = DFFEAS(AB1L15, GLOBAL(R1L12),  ,  ,  ,  ,  ,  ,  );


--AB1L20 is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|RTYY:inst2|lpm_shiftreg:lpm_shiftreg_component|dffs[3]~ICOMBOUT at LCCOMB_X2_Y5_N20
AB1L20 = S1_inst & (V1_CQI[3]) # !S1_inst & AB1_dffs[2];


--B1_inst9 is CPU8051V1:inst|inst9 at LCFF_X4_Y6_N9
B1_inst9 = DFFEAS(B1L4, GLOBAL(UC1L2),  ,  ,  ,  ,  ,  ,  );


--B1L9 is CPU8051V1:inst|inst19~ICOMBOUT at LCCOMB_X4_Y6_N4
B1L9 = !B1_inst19;


--X1_CQI[4] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|CNT6CA:inst32|CQI[4] at LCFF_X5_Y6_N15
X1_CQI[4] = DFFEAS(X1L26, GLOBAL(B1L11), !S1_inst,  ,  ,  ,  ,  ,  );


--X1_CQI[5] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|CNT6CA:inst32|CQI[5] at LCFF_X5_Y6_N17
X1_CQI[5] = DFFEAS(X1L30, GLOBAL(B1L11), !S1_inst,  ,  ,  ,  ,  ,  );


--X1_CQI[3] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|CNT6CA:inst32|CQI[3] at LCFF_X5_Y6_N13
X1_CQI[3] = DFFEAS(X1L21, GLOBAL(B1L11), !S1_inst,  ,  ,  ,  ,  ,  );


--X1_CQI[1] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|CNT6CA:inst32|CQI[1] at LCFF_X5_Y6_N9
X1_CQI[1] = DFFEAS(X1L11, GLOBAL(B1L11), !S1_inst,  ,  ,  ,  ,  ,  );


--X1_CQI[0] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|CNT6CA:inst32|CQI[0] at LCFF_X5_Y6_N25
X1_CQI[0] = DFFEAS(X1L5, GLOBAL(B1L11), !S1_inst,  ,  ,  ,  ,  ,  );


--X1_CQI[2] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|CNT6CA:inst32|CQI[2] at LCFF_X5_Y6_N11
X1_CQI[2] = DFFEAS(X1L16, GLOBAL(B1L11), !S1_inst,  ,  ,  ,  ,  ,  );


--X1L33 is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|CNT6CA:inst32|Equal0~49 at LCCOMB_X5_Y6_N22
X1L33 = X1_CQI[3] & !X1_CQI[1] & !X1_CQI[0] & X1_CQI[2];


--X1_Equal0 is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|CNT6CA:inst32|Equal0 at LCCOMB_X5_Y6_N4
X1_Equal0 = !X1_CQI[4] & X1_CQI[5] & X1L33;


--V1_CQI[4] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|CNT32:inst6|CQI[4] at LCFF_X1_Y5_N17
V1_CQI[4] = DFFEAS(V1L26, GLOBAL(B1L11),  ,  ,  ,  ,  ,  ,  );


--AB1L25 is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|RTYY:inst2|lpm_shiftreg:lpm_shiftreg_component|dffs[4]~ICOMBOUT at LCCOMB_X2_Y5_N0
AB1L25 = S1_inst & (V1_CQI[4]) # !S1_inst & AB1_dffs[3];


--AB1_dffs[7] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|RTYY:inst2|lpm_shiftreg:lpm_shiftreg_component|dffs[7] at LCFF_X2_Y5_N7
AB1_dffs[7] = DFFEAS(AB1L40, GLOBAL(R1L12),  ,  ,  ,  ,  ,  ,  );


--V1_CQI[8] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|CNT32:inst6|CQI[8] at LCFF_X1_Y5_N25
V1_CQI[8] = DFFEAS(V1L46, GLOBAL(B1L11),  ,  ,  ,  ,  ,  ,  );


--AB1L45 is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|RTYY:inst2|lpm_shiftreg:lpm_shiftreg_component|dffs[8]~ICOMBOUT at LCCOMB_X2_Y5_N10
AB1L45 = S1_inst & (V1_CQI[8]) # !S1_inst & AB1_dffs[7];


--V1_CQI[1] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|CNT32:inst6|CQI[1] at LCFF_X1_Y5_N11
V1_CQI[1] = DFFEAS(V1L11, GLOBAL(B1L11),  ,  ,  ,  ,  ,  ,  );


--AB1_dffs[0] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|RTYY:inst2|lpm_shiftreg:lpm_shiftreg_component|dffs[0] at LCFF_X2_Y5_N5
AB1_dffs[0] = DFFEAS(AB1L5, GLOBAL(R1L12),  ,  ,  ,  ,  ,  ,  );


--AB1L10 is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|RTYY:inst2|lpm_shiftreg:lpm_shiftreg_component|dffs[1]~ICOMBOUT at LCCOMB_X2_Y5_N12
AB1L10 = S1_inst & V1_CQI[1] # !S1_inst & (AB1_dffs[0]);


--V1_CQI[23] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|CNT32:inst6|CQI[23] at LCFF_X1_Y4_N23
V1_CQI[23] = DFFEAS(V1L120, GLOBAL(B1L11),  ,  ,  ,  ,  ,  ,  );


--AB1_dffs[22] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|RTYY:inst2|lpm_shiftreg:lpm_shiftreg_component|dffs[22] at LCFF_X1_Y4_N29
AB1_dffs[22] = DFFEAS(AB1L115, GLOBAL(R1L12),  ,  ,  ,  ,  ,  ,  );


--AB1L120 is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|RTYY:inst2|lpm_shiftreg:lpm_shiftreg_component|dffs[23]~ICOMBOUT at LCCOMB_X1_Y4_N30
AB1L120 = S1_inst & (V1_CQI[23]) # !S1_inst & AB1_dffs[22];


--M1_hub_tdo is sld_hub:sld_hub_inst|hub_tdo at LCFF_X10_Y8_N27
M1_hub_tdo = AMPP_FUNCTION(!A1L6, M1L19, !AD1_state[8]);


--AB1_dffs[15] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|RTYY:inst2|lpm_shiftreg:lpm_shiftreg_component|dffs[15] at LCFF_X1_Y6_N15
AB1_dffs[15] = DFFEAS(AB1L80, GLOBAL(R1L12),  ,  ,  ,  ,  ,  ,  );


--R1L4 is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|inst5~ICOMBOUT at LCCOMB_X2_Y6_N6
R1L4 = AB1_dffs[9] $ AB1_dffs[4] $ AB1_dffs[1] $ AB1_dffs[15];


--AB1_dffs[11] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|RTYY:inst2|lpm_shiftreg:lpm_shiftreg_component|dffs[11] at LCFF_X1_Y6_N29
AB1_dffs[11] = DFFEAS(AB1L60, GLOBAL(R1L12),  ,  ,  ,  ,  ,  ,  );


--R1L17 is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|inst19~ICOMBOUT at LCCOMB_X1_Y6_N2
R1L17 = AB1_dffs[5] $ AB1_dffs[0] $ AB1_dffs[2] $ AB1_dffs[11];


--Z1L5 is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|CNT6C:inst35|CQI[0]~ICOMBOUT at LCCOMB_X17_Y7_N26
Z1L5 = !Z1_CQI[0];


--S1_inst1 is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|START:inst1|inst1 at LCFF_X1_Y5_N9
S1_inst1 = DFFEAS(UNCONNECTED_DATAIN, S1_inst3, !RST,  ,  , S1_inst,  ,  , VCC);


--S1_inst3 is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|START:inst1|inst3 at LCCOMB_X1_Y5_N8
S1_inst3 = S1_inst1 # V1_CQI[1];


--S1L9 is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|START:inst1|inst~ICOMBOUT at LCCOMB_X1_Y5_N6
S1L9 = !S1_inst & !S1_inst1;