mcu8951.map.eqn

Alera 的8051 IP core的示例文件5个

--QB1_NEWDATA is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|NEWDATA
QB1_NEWDATA = DFFEAS(QB1L175, UC1__clk0,  ,  ,  ,  ,  ,  ,  );


--HC1_DAT[1] is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|m3s030bo:U9|DAT[1]
HC1_DAT[1] = DFFEAS(HC1L10, UC1__clk0,  ,  ,  ,  ,  , !P1_CLEAR,  );


--HB1_RAMDI[0] is CPU8051V1:inst|MCU80512:inst3|m3s008bo:U7|RAMDI[0]
HB1_RAMDI[0] = DFFEAS(HB1L454, UC1__clk0, RST,  ,  , HB1_RAMDI[0],  ,  , !BB1_STATD[6]);


--HC1L42 is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|m3s030bo:U9|DAT~138
HC1L42 = QB1_NEWDATA & (HB1_RAMDI[0]) # !QB1_NEWDATA & HC1_DAT[1];


--HC1L5 is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|m3s030bo:U9|DAT[0]~ICOMBOUT
HC1L5 = AC1_SFRW[11] & (HC1L42) # !AC1_SFRW[11] & (QB1L348 & (HC1L42) # !QB1L348 & HC1_DAT[0]);


--QB1L24 is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|DATAEN~184
QB1L24 = QB1L400 & !BB1_LDV2CK1 & (QB1_TSEND # !QB1L169);


--QB1L28 is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|DATAEN~ICOMBOUT
QB1L28 = !QB1_Q6 & !QB1L406 & (QB1_DATAEN # QB1L24);


--QB1L374 is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|TXLASTBIT~301
QB1L374 = !QB1_Q6 & P1_CLEAR;


--HC1_DAT[5] is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|m3s030bo:U9|DAT[5]
HC1_DAT[5] = DFFEAS(HC1L30, UC1__clk0,  ,  ,  ,  ,  , !P1_CLEAR,  );


--HC1_DAT[6] is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|m3s030bo:U9|DAT[6]
HC1_DAT[6] = DFFEAS(HC1L35, UC1__clk0,  ,  ,  ,  ,  , !P1_CLEAR,  );


--HC1_DAT[4] is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|m3s030bo:U9|DAT[4]
HC1_DAT[4] = DFFEAS(HC1L25, UC1__clk0,  ,  ,  ,  ,  , !P1_CLEAR,  );


--HC1_DAT[3] is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|m3s030bo:U9|DAT[3]
HC1_DAT[3] = DFFEAS(HC1L20, UC1__clk0,  ,  ,  ,  ,  , !P1_CLEAR,  );


--QB1L380 is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|TXLASTBIT~303
QB1L380 = !HC1_DAT[5] & !HC1_DAT[6] & !HC1_DAT[4] & !HC1_DAT[3];


--HC1_DAT[2] is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|m3s030bo:U9|DAT[2]
HC1_DAT[2] = DFFEAS(HC1L15, UC1__clk0,  ,  ,  ,  ,  , !P1_CLEAR,  );


--QB1_TSHIFT_IN is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|TSHIFT_IN
QB1_TSHIFT_IN = DFFEAS(QB1L360, UC1__clk0,  ,  ,  ,  ,  , !P1_CLEAR,  );


--QB1_TXSTOPBIT is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|TXSTOPBIT
QB1_TXSTOPBIT = DFFEAS(QB1L395, UC1__clk0,  ,  ,  ,  ,  ,  ,  );


--QB1L377 is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|TXLASTBIT~302
QB1L377 = QB1_TSEND & !HC1_DAT[2] & !QB1_TSHIFT_IN & !QB1_TXSTOPBIT;


--HC1_DAT[7] is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|m3s030bo:U9|DAT[7]
HC1_DAT[7] = DFFEAS(HC1L40, UC1__clk0,  ,  ,  ,  ,  , !P1_CLEAR,  );


--QB1L403 is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|setlastbit~119
QB1L403 = QB1L400 & BB1_LDV2CK1;


--QB1L383 is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|TXLASTBIT~304
QB1L383 = QB1L380 & QB1L377 & !HC1_DAT[7] & QB1L403;


--QB1L387 is CPU8051V1:inst|MCU80512:inst3|m3s028bo:U15|TXLASTBIT~ICOMBOUT
QB1L387 = QB1L374 & (QB1L383 # QB1_TXLASTBIT & !QB1L403);


--HB1_RAMDI[1] is CPU8051V1:inst|MCU80512:inst3|m3s008bo:U7|RAMDI[1]
HB1_RAMDI[1] = DFFEAS(HB1L459, UC1__clk0, RST,  ,  , HB1_RAMDI[1],  ,  , !BB1_STATD[6]);


--LB1L343 is CPU8051V1:inst|MCU80512:inst3|m3s018bo:U10|PORT3_SFR[1]~ICOMBOUT
LB1L343 = LB1L357 & (HB1L305 & (!HB1_RAMDI[1]) # !HB1L305 & LB1_PORT3_SFR[1]) # !LB1L357 & LB1_PORT3_SFR[1];


--LB1L338 is CPU8051V1:inst|MCU80512:inst3|m3s018bo:U10|PORT3_SFR[0]~ICOMBOUT
LB1L338 = LB1L357 & (HB1L305 & !HB1_RAMDI[0] # !HB1L305 & (LB1_PORT3_SFR[0])) # !LB1L357 & (LB1_PORT3_SFR[0]);


--LB1_PORT1_SFR[4] is CPU8051V1:inst|MCU80512:inst3|m3s018bo:U10|PORT1_SFR[4]
LB1_PORT1_SFR[4] = DFFEAS(LB1L273, UC1__clk0, RST,  ,  ,  ,  ,  ,  );


--LB1_PORT1_SFR[5] is CPU8051V1:inst|MCU80512:inst3|m3s018bo:U10|PORT1_SFR[5]
LB1_PORT1_SFR[5] = DFFEAS(LB1L281, UC1__clk0, RST,  ,  ,  ,  ,  ,  );


--LB1_PORT1_SFR[6] is CPU8051V1:inst|MCU80512:inst3|m3s018bo:U10|PORT1_SFR[6]
LB1_PORT1_SFR[6] = DFFEAS(LB1L286, UC1__clk0, RST,  ,  ,  ,  ,  ,  );


--LB1_PORT1_SFR[7] is CPU8051V1:inst|MCU80512:inst3|m3s018bo:U10|PORT1_SFR[7]
LB1_PORT1_SFR[7] = DFFEAS(LB1L291, UC1__clk0, RST,  ,  ,  ,  ,  ,  );


--V1_CQI[9] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|CNT32:inst6|CQI[9]
V1_CQI[9] = DFFEAS(V1L51, B1_inst19,  ,  ,  ,  ,  ,  ,  );


--AB1L50 is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|RTYY:inst2|lpm_shiftreg:lpm_shiftreg_component|dffs[9]~ICOMBOUT
AB1L50 = S1_inst & (V1_CQI[9]) # !S1_inst & AB1_dffs[8];


--V1_CQI[6] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|CNT32:inst6|CQI[6]
V1_CQI[6] = DFFEAS(V1L36, B1_inst19,  ,  ,  ,  ,  ,  ,  );


--AB1_dffs[5] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|RTYY:inst2|lpm_shiftreg:lpm_shiftreg_component|dffs[5]
AB1_dffs[5] = DFFEAS(AB1L30, R1_inst15,  ,  ,  ,  ,  ,  ,  );


--AB1L35 is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|RTYY:inst2|lpm_shiftreg:lpm_shiftreg_component|dffs[6]~ICOMBOUT
AB1L35 = S1_inst & V1_CQI[6] # !S1_inst & (AB1_dffs[5]);


--V1_CQI[3] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|CNT32:inst6|CQI[3]
V1_CQI[3] = DFFEAS(V1L21, B1_inst19,  ,  ,  ,  ,  ,  ,  );


--AB1_dffs[2] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|RTYY:inst2|lpm_shiftreg:lpm_shiftreg_component|dffs[2]
AB1_dffs[2] = DFFEAS(AB1L15, R1_inst15,  ,  ,  ,  ,  ,  ,  );


--AB1L20 is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|RTYY:inst2|lpm_shiftreg:lpm_shiftreg_component|dffs[3]~ICOMBOUT
AB1L20 = S1_inst & V1_CQI[3] # !S1_inst & (AB1_dffs[2]);


--B1_inst9 is CPU8051V1:inst|inst9
B1_inst9 = DFFEAS(B1L4, UC1__clk0,  ,  ,  ,  ,  ,  ,  );


--B1L9 is CPU8051V1:inst|inst19~ICOMBOUT
B1L9 = !B1_inst19;


--X1_CQI[4] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|CNT6CA:inst32|CQI[4]
X1_CQI[4] = DFFEAS(X1L26, B1_inst19, !S1_inst,  ,  ,  ,  ,  ,  );


--X1_CQI[5] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|CNT6CA:inst32|CQI[5]
X1_CQI[5] = DFFEAS(X1L30, B1_inst19, !S1_inst,  ,  ,  ,  ,  ,  );


--X1_CQI[3] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|CNT6CA:inst32|CQI[3]
X1_CQI[3] = DFFEAS(X1L21, B1_inst19, !S1_inst,  ,  ,  ,  ,  ,  );


--X1_CQI[1] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|CNT6CA:inst32|CQI[1]
X1_CQI[1] = DFFEAS(X1L11, B1_inst19, !S1_inst,  ,  ,  ,  ,  ,  );


--X1_CQI[0] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|CNT6CA:inst32|CQI[0]
X1_CQI[0] = DFFEAS(X1L5, B1_inst19, !S1_inst,  ,  ,  ,  ,  ,  );


--X1_CQI[2] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|CNT6CA:inst32|CQI[2]
X1_CQI[2] = DFFEAS(X1L16, B1_inst19, !S1_inst,  ,  ,  ,  ,  ,  );


--X1L33 is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|CNT6CA:inst32|Equal0~49
X1L33 = X1_CQI[3] & !X1_CQI[1] & !X1_CQI[0] & X1_CQI[2];


--X1_Equal0 is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|CNT6CA:inst32|Equal0
X1_Equal0 = !X1_CQI[4] & X1_CQI[5] & X1L33;


--V1_CQI[4] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|CNT32:inst6|CQI[4]
V1_CQI[4] = DFFEAS(V1L26, B1_inst19,  ,  ,  ,  ,  ,  ,  );


--AB1L25 is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|RTYY:inst2|lpm_shiftreg:lpm_shiftreg_component|dffs[4]~ICOMBOUT
AB1L25 = S1_inst & (V1_CQI[4]) # !S1_inst & AB1_dffs[3];


--AB1_dffs[7] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|RTYY:inst2|lpm_shiftreg:lpm_shiftreg_component|dffs[7]
AB1_dffs[7] = DFFEAS(AB1L40, R1_inst15,  ,  ,  ,  ,  ,  ,  );


--V1_CQI[8] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|CNT32:inst6|CQI[8]
V1_CQI[8] = DFFEAS(V1L46, B1_inst19,  ,  ,  ,  ,  ,  ,  );


--AB1L45 is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|RTYY:inst2|lpm_shiftreg:lpm_shiftreg_component|dffs[8]~ICOMBOUT
AB1L45 = S1_inst & (V1_CQI[8]) # !S1_inst & AB1_dffs[7];


--V1_CQI[1] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|CNT32:inst6|CQI[1]
V1_CQI[1] = DFFEAS(V1L11, B1_inst19,  ,  ,  ,  ,  ,  ,  );


--AB1_dffs[0] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|RTYY:inst2|lpm_shiftreg:lpm_shiftreg_component|dffs[0]
AB1_dffs[0] = DFFEAS(AB1L5, R1_inst15,  ,  ,  ,  ,  ,  ,  );


--AB1L10 is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|RTYY:inst2|lpm_shiftreg:lpm_shiftreg_component|dffs[1]~ICOMBOUT
AB1L10 = S1_inst & V1_CQI[1] # !S1_inst & (AB1_dffs[0]);


--V1_CQI[23] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|CNT32:inst6|CQI[23]
V1_CQI[23] = DFFEAS(V1L120, B1_inst19,  ,  ,  ,  ,  ,  ,  );


--AB1_dffs[22] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|RTYY:inst2|lpm_shiftreg:lpm_shiftreg_component|dffs[22]
AB1_dffs[22] = DFFEAS(AB1L115, R1_inst15,  ,  ,  ,  ,  ,  ,  );


--AB1L120 is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|RTYY:inst2|lpm_shiftreg:lpm_shiftreg_component|dffs[23]~ICOMBOUT
AB1L120 = S1_inst & V1_CQI[23] # !S1_inst & (AB1_dffs[22]);


--M1_hub_tdo is sld_hub:sld_hub_inst|hub_tdo
M1_hub_tdo = AMPP_FUNCTION(!A1L5, M1L19, !AD1_state[8]);


--AB1_dffs[15] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|RTYY:inst2|lpm_shiftreg:lpm_shiftreg_component|dffs[15]
AB1_dffs[15] = DFFEAS(AB1L80, R1_inst15,  ,  ,  ,  ,  ,  ,  );


--R1L4 is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|inst5~ICOMBOUT
R1L4 = AB1_dffs[15] $ AB1_dffs[4] $ AB1_dffs[9] $ AB1_dffs[1];


--AB1_dffs[11] is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|RTYY:inst2|lpm_shiftreg:lpm_shiftreg_component|dffs[11]
AB1_dffs[11] = DFFEAS(AB1L60, R1_inst15,  ,  ,  ,  ,  ,  ,  );


--R1L15 is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|inst19~ICOMBOUT
R1L15 = AB1_dffs[11] $ AB1_dffs[5] $ AB1_dffs[0] $ AB1_dffs[2];


--Z1L5 is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|CNT6C:inst35|CQI[0]~ICOMBOUT
Z1L5 = !Z1_CQI[0];


--S1_inst1 is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|START:inst1|inst1
S1_inst1 = DFFEAS(VCC, S1_inst3, !RST,  ,  , S1_inst,  ,  , VCC);


--S1_inst3 is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|START:inst1|inst3
S1_inst3 = S1_inst1 # V1_CQI[1];


--S1L9 is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|START:inst1|inst~ICOMBOUT
S1L9 = !S1_inst1 & !S1_inst;


--W1_STX.ST12 is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|MEALY1:inst14|STX.ST12
W1_STX.ST12 = DFFEAS(W1L32, R1_inst26, !R1_inst28,  ,  ,  ,  ,  ,  );


--W1L72 is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|MEALY1:inst14|Selector14~15
W1L72 = !R1_inst5 & !R1_inst10 & !MT & W1_STX.ST12;


--W1L69 is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|MEALY1:inst14|Selector0~23
W1L69 = W1_STX.ST12 # !R1_inst5 & !MT & !R1_inst10;


--W1_Q is CPU8051V1:inst|JM_S1:inst|FPGA_1:inst1|MEALY1:inst14|Q
W1_Q = W1L69 & (W1L72) # !W1L69 & W1_Q;


--ZB1_REG_HI_NIBBLE[7] is CPU8051V1:inst|MCU80512:inst3|m3s008bo:U7|m3s009bo:U1|REG_HI_NIBBLE[7]
ZB1_REG_HI_NIBBLE[7] = DFFEAS(ZB1L19, UC1__clk0, RST,  ,  , ZB1_REG_HI_NIBBLE[7],  ,  , HB1L850);


--TB1L19 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s022bo:U1|HIDEC~21
TB1L19 = PB1_OPC[5] # !PB1_OPC[4] # !PB1_OPC[7] # !PB1_OPC[6];


--VB1L24 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s033bo:U3|ACCADD[4]~788
VB1L24 = !PB1_OPC[3] & PB1_OPC[2] & PB1_OPC[1] & !TB1L19;


--TB1L4 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s022bo:U1|HIDEC~7
TB1L4 = PB1_OPC[7] # !PB1_OPC[5] # !PB1_OPC[6] # !PB1_OPC[4];


--TB1L40 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s022bo:U1|LODEC~5
TB1L40 = PB1_OPC[3] # PB1_OPC[0] # PB1_OPC[2] # !PB1_OPC[1];


--TB1L37 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s022bo:U1|LODEC~3
TB1L37 = PB1_OPC[2] # PB1_OPC[1] # PB1_OPC[3] # !PB1_OPC[0];


--TB1L1 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s022bo:U1|HIDEC~1
TB1L1 = PB1_OPC[6] # PB1_OPC[5] # PB1_OPC[7] # !PB1_OPC[4];


--YB1_REGADD[9] is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s035bo:U6|REGADD[9]
YB1_REGADD[9] = PB1_OPC[4] & (!TB1L40 & !TB1L1 # !TB1L37) # !PB1_OPC[4] & !TB1L40 & (!TB1L1);


--WB1L7 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s032bo:U4|AF~29
WB1L7 = !PB1_OPC[3] & (!PB1_OPC[1] & !PB1_OPC[0] # !PB1_OPC[2]);


--HB1L476 is CPU8051V1:inst|MCU80512:inst3|m3s008bo:U7|RAMDI[4]~589
HB1L476 = YB1_REGADD[9] # !TB1L4 & !WB1L7 # !VB1L24;


--JB1_STACK_DATA[7] is CPU8051V1:inst|MCU80512:inst3|m3s010bo:U8|STACK_DATA[7]
JB1_STACK_DATA[7] = DFFEAS(JB1L581, UC1__clk0,  ,  ,  ,  ,  ,  ,  );


--P1_IMMDAT[7] is CPU8051V1:inst|MCU80512:inst3|IMMDAT[7]
P1_IMMDAT[7] = DFFEAS(P1L77, UC1__clk0,  ,  ,  , P1_IMMDAT[7],  ,  , P1L34);


--ZB1_STACK_MUX is CPU8051V1:inst|MCU80512:inst3|m3s008bo:U7|m3s009bo:U1|STACK_MUX
ZB1_STACK_MUX = DFFEAS(ZB1L25, UC1__clk0, RST,  ,  , ZB1_STACK_MUX,  ,  , !BB1_LDV2CK2);


--HB1L473 is CPU8051V1:inst|MCU80512:inst3|m3s008bo:U7|RAMDI[4]~586
HB1L473 = YB1_REGADD[9] & (!ZB1_STACK_MUX) # !YB1_REGADD[9] & !WB1L7 & !TB1L4;


--JB1_STACK_DATA[15] is CPU8051V1:inst|MCU80512:inst3|m3s010bo:U8|STACK_DATA[15]
JB1_STACK_DATA[15] = DFFEAS(JB1L621, UC1__clk0,  ,  ,  ,  ,  ,  ,  );


--TB1L16 is CPU8051V1:inst|MCU80512:inst3|m3s004bo:U3|m3s022bo:U1|HIDEC~18
TB1L16 = PB1_OPC[5] # PB1_OPC[4] # !PB1_OPC[7] # !PB1_OPC[6];