yima.vhd

来自「本源码用VHDL语言实现了用键盘控制米字管显示十进制」· VHDL 代码 · 共 39 行

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity yima is 
	port(kin3,kin2,kin1,kin0:in std_logic;
              sel2,sel1,sel0:in std_logic;
        Y:out std_logic_vector(6 downto 0));
end yima;

architecture yima_arch of yima is
signal a:std_logic_vector(3 downto 0);
signal b:std_logic_vector(2 downto 0);
signal c:std_logic;
begin

a<=kin3&kin2&kin1&kin0;
b<=sel2&sel1&sel0;
c<=kin3 and kin2 and kin2 and kin0;


Y<="1111110"when (b="000" and a="1110" ) else
   "1011111"when (b="000" and a="1101" ) else
   "0110000"when (b="001" and a="1110" ) else
   "1110000"when (b="001" and a="1101" ) else
   "1101101"when (b="010" and a="1110" ) else
   "1001110"when (b="010" and a="1011" ) else
   "1111001"when (b="011" and a="1110" ) else
   "0111101"when (b="011" and a="1011" ) else
   "1111111"when (b="100" and a="1101" ) else
   "1001111"when (b="100" and a="1011" ) else
   "1111011"when (b="101" and a="1101" ) else
   "1000111"when (b="101" and a="1011" ) else
   "0110011"when (b="110" and a="1110" ) else
   "1110111"when (b="110" and a="1101" ) else
   "1011011"when (b="111" and a="1110" ) else
   "0011111"when (b="111" and a="1101" ) else
   "0000000";
end yima_arch;