paddr.fit.summary

来自「4位二进制加法器」· SUMMARY 代码 · 共 17 行

Fitter Status : Successful - Mon Apr 06 16:43:13 2009
Quartus II Version : 8.1 Build 163 10/28/2008 SJ Full Version
Revision Name : paddr
Top-level Entity Name : padder
Family : Cyclone II
Device : EP2C70F896C6
Timing Models : Final
Total logic elements : 31 / 68,416 ( < 1 % )
    Total combinational functions : 31 / 68,416 ( < 1 % )
    Dedicated logic registers : 0 / 68,416 ( 0 % )
Total registers : 0
Total pins : 34 / 622 ( 5 % )
Total virtual pins : 0
Total memory bits : 0 / 1,152,000 ( 0 % )
Embedded Multiplier 9-bit elements : 0 / 300 ( 0 % )
Total PLLs : 0 / 4 ( 0 % )