op_ctrl.v

Verilog for I2C core source code

                                                next_state <= DIR ? `OP_DATA_W : `OP_READDR;
                                                next_comm <= `I2C_CMD_NOP;
                                              end
                                            else
                                              begin
                                                next_state <= `OP_TADDR; 
                                                next_comm <= `I2C_CMD_READ;
                                              end   
                                          end                 
                         default        : begin
                                            next_state <= `OP_IDLE;
                                            next_comm <= `I2C_CMD_NOP; 
                                            data <= 0;
                                            ld <= 0;  
                                            cnt_ld <= 0;
                                            chk_ask <= 0;                                            
                                          end
                        endcase                                    
                     end             
        `OP_DATA_W : begin
                       op_res <= 0;
                       shift <= 0;
                       sa <= 0;
                       busy_n <= 1;
                       out_ask <= 0;
                       case(curr_comm)
                         `I2C_CMD_NOP   : begin
                                            next_state <= `OP_DATA_W;
                                            next_comm <= `I2C_CMD_WRITE; 
                                            data <= DATA_IN;
                                            ld <= 1;    
                                            cnt_ld <= 1;
                                            chk_ask <= 0;   
                                            full <= 0;
                                            empty <= 1;                                                                                  
                                          end 
                         `I2C_CMD_WRITE : begin                                    //write 8bit
                                            next_state <= `OP_DATA_W;                         
                                            data <= 0;
                                            ld <= 0;     
                                            cnt_ld <= 0;
                                            chk_ask <= 0;
                                            full <= 0;
                                            empty <= 0;                                             
                                            if(cnt_done) 
                                              begin
                                                next_comm <= `I2C_CMD_READ;                                                
                                              end  
                                            else
                                              begin                                                
                                                next_comm <= `I2C_CMD_WRITE; 
                                              end                                                                                      
                                          end
                         `I2C_CMD_READ  : begin                                          //ack
                                            data <= 0;
                                            ld <= 0;    
                                            cnt_ld <= 0;  
                                            chk_ask <= 1;    
                                            full <= 0;
                                            empty <= 0;                                                             
                                            if(COMM_RES)
                                              begin
                                                next_state <= trans_done ? `OP_END : `OP_DATA_W;
                                                next_comm <=  `I2C_CMD_NOP;
                                              end
                                            else
                                              begin
                                                next_state <= `OP_DATA_W; 
                                                next_comm <= `I2C_CMD_READ;
                                              end   
                                          end                 
                         default        : begin
                                            next_state <= `OP_IDLE;
                                            next_comm <= `I2C_CMD_NOP; 
                                            data <= 0;
                                            ld <= 0;   
                                            cnt_ld <= 0;
                                            chk_ask <= 0;   
                                            full <= 0;
                                            empty <= 0;                                                                                    
                                          end                
                       endcase                      
                     end
        `OP_READDR : begin                                               //读时，需要再次发送器件地址
                       op_res <= 0;
                       shift <= 0;
                       sa <= 0;
                       busy_n <= 1;
                       full <= 0;
                       empty <= 0;    
                       out_ask <= 0;                    
                       case(curr_comm)
                         `I2C_CMD_NOP   : begin
                                            next_state <= `OP_READDR;
                                            next_comm <= `I2C_CMD_START;
                                            data <= 0;
                                            ld <= 0;
                                            cnt_ld <= 0;
                                            chk_ask <= 0;
                                          end
                         `I2C_CMD_START : begin
                                            next_state <= `OP_READDR;
                                            chk_ask <= 0;
                                            if(COMM_RES)
                                              begin 
                                                next_comm <= `I2C_CMD_WRITE;
                                                data <= {DEVICE, 1'b1};            //read
                                                ld <= 1;
                                                cnt_ld <= 1;
                                              end
                                            else
                                              begin
                                                next_comm <= `I2C_CMD_START;
                                                data <= 0;
                                                ld <= 0;   
                                                cnt_ld <= 0;                                             
                                              end     
                                          end 
                         `I2C_CMD_WRITE : begin                       //write 8bit
                                            chk_ask <= 0;
                                            next_state <= `OP_READDR; 
                                            data <= 0;
                                            ld <= 0;   
                                            cnt_ld <= 0;                                         
                                            if(cnt_done) 
                                              begin
                                                next_comm <= `I2C_CMD_READ;
                                              end  
                                            else
                                              begin
                                                next_comm <= `I2C_CMD_WRITE; 
                                              end  
                                          end
                         `I2C_CMD_READ  : begin                                          //ack
                                            data <= 0;
                                            ld <= 0;    
                                            cnt_ld <= 0;  
                                            chk_ask <= 1;                    
                                            if(COMM_RES)
                                              begin
                                                next_state <= `OP_DATA_R; 
                                                next_comm <= `I2C_CMD_NOP;
                                              end
                                            else
                                              begin
                                                next_state <= `OP_READDR; 
                                                next_comm <= `I2C_CMD_READ;
                                              end   
                                          end                
                         default        : begin
                                            data <= 0;
                                            ld <= 0;   
                                            cnt_ld <= 0; 
                                            chk_ask <= 0;                      
                                            next_state <= `OP_IDLE;
                                            next_comm <= `I2C_CMD_NOP;
                                          end
                        endcase  
                     end
        `OP_DATA_R : begin
                       op_res <= 0;
                       data <= 0;
                       ld <= 0; 
                       chk_ask <= 0;  
                       busy_n <= 1;                     
                       case(curr_comm)
                         `I2C_CMD_NOP   : begin
                                            next_state <= `OP_DATA_R;
                                            next_comm <= `I2C_CMD_READ;   
                                            cnt_ld <= 1;
                                            shift <= 0;          
                                            sa <= 0;     
                                            full <= 0;
                                            empty <= 0;   
                                            out_ask <= 0;                                                                  
                                          end 
                         `I2C_CMD_READ  : begin                                    //read 8bit
                                            next_state <= `OP_DATA_R;    
                                            cnt_ld <= 0;                        
                                            shift <= 1;
                                            sa <= 0;
                                            full <= 0;
                                            empty <= 0;                                              
                                            if(cnt_done) 
                                              begin
                                                next_comm <= `I2C_CMD_WRITE;     
                                                out_ask <= 1;                                           
                                              end  
                                            else
                                              begin                                                
                                                next_comm <= `I2C_CMD_READ; 
                                                out_ask <= 0;
                                              end                                                                                      
                                          end
                         `I2C_CMD_WRITE  : begin                                          //ack    
                                            shift <= 0;      
                                            cnt_ld <= 0;   
                                            sa <= 1;                                                                                         
                                            if(COMM_RES)
                                              begin
                                                full <= 1;
                                                empty <= 0;    
                                                out_ask <= 0;                                              
                                                next_state <= trans_done ? `OP_END : `OP_DATA_R;
                                                next_comm <= `I2C_CMD_NOP;
                                              end
                                            else
                                              begin
                                                full <= 0;
                                                empty <= 0;      
                                                out_ask <= 1;                                            
                                                next_state <= `OP_DATA_R; 
                                                next_comm <= `I2C_CMD_WRITE;
                                              end   
                                          end                 
                         default        : begin
                                            next_state <= `OP_IDLE;
                                            next_comm <= `I2C_CMD_NOP;   
                                            shift <= 0;       
                                            cnt_ld <= 0;    
                                            sa <= 0;   
                                            full <= 0;
                                            empty <= 0;   
                                            out_ask <= 0;                                                                      
                                          end                
                       endcase                                                                    
                     end
        `OP_END    : begin
                       op_res <= 0;
                       chk_ask <= 0;
                       data <= 0;