original_signal.fit.rpt

一种基于LUT的预失真方法。其中的一部分

; dds2ch:inst3|mux:U_mux|dataw[18]                            ; Packed Register ; Register Packing ; Timing optimization ; Q         ; dds2ch:inst3|romwl:U_romwl|altsyncram:Ram0_rtl_1|altsyncram_mtv:auto_generated|q_a[18]             ; PORTADATAOUT     ;
; dds2ch:inst3|mux:U_mux|dataw[19]                            ; Packed Register ; Register Packing ; Timing optimization ; Q         ; dds2ch:inst3|romwl:U_romwl|altsyncram:Ram0_rtl_1|altsyncram_mtv:auto_generated|q_a[19]             ; PORTADATAOUT     ;
; dds2ch:inst3|mux:U_mux|dataw[20]                            ; Packed Register ; Register Packing ; Timing optimization ; Q         ; dds2ch:inst3|romwl:U_romwl|altsyncram:Ram0_rtl_1|altsyncram_mtv:auto_generated|q_a[20]             ; PORTADATAOUT     ;
; dds2ch:inst3|mux:U_mux|dataw[21]                            ; Packed Register ; Register Packing ; Timing optimization ; Q         ; dds2ch:inst3|romwl:U_romwl|altsyncram:Ram0_rtl_1|altsyncram_mtv:auto_generated|q_a[21]             ; PORTADATAOUT     ;
; dds2ch:inst3|mux:U_mux|dataw[22]                            ; Packed Register ; Register Packing ; Timing optimization ; Q         ; dds2ch:inst3|romwl:U_romwl|altsyncram:Ram0_rtl_1|altsyncram_mtv:auto_generated|q_a[22]             ; PORTADATAOUT     ;
; dds2ch:inst3|mux:U_mux|dataw[23]                            ; Packed Register ; Register Packing ; Timing optimization ; Q         ; dds2ch:inst3|romwl:U_romwl|altsyncram:Ram0_rtl_1|altsyncram_mtv:auto_generated|q_a[23]             ; PORTADATAOUT     ;
; dds2ch:inst3|mux:U_mux|dataw[24]                            ; Packed Register ; Register Packing ; Timing optimization ; Q         ; dds2ch:inst3|romwl:U_romwl|altsyncram:Ram0_rtl_1|altsyncram_mtv:auto_generated|q_a[24]             ; PORTADATAOUT     ;
; dds2ch:inst3|mux:U_mux|dataw[25]                            ; Packed Register ; Register Packing ; Timing optimization ; Q         ; dds2ch:inst3|romwl:U_romwl|altsyncram:Ram0_rtl_1|altsyncram_mtv:auto_generated|q_a[25]             ; PORTADATAOUT     ;
+-------------------------------------------------------------+-----------------+------------------+---------------------+-----------+----------------------------------------------------------------------------------------------------+------------------+


+--------------+
; Pin-Out File ;
+--------------+
The pin-out file can be found in E:/Graduation_Design/Quartus/original_signal/original_signal.pin.


+-------------------------------------------------------------------------------------------------------------------------------+
; Fitter Resource Usage Summary                                                                                                 ;
+---------------------------------------------+---------------------------------------------------------------------------------+
; Resource                                    ; Usage                                                                           ;
+---------------------------------------------+---------------------------------------------------------------------------------+
; Total logic elements                        ; 618 / 24,624 ( 3 % )                                                            ;
;     -- Combinational with no register       ; 45                                                                              ;
;     -- Register only                        ; 226                                                                             ;
;     -- Combinational with a register        ; 347                                                                             ;
;                                             ;                                                                                 ;
; Logic element usage by number of LUT inputs ;                                                                                 ;
;     -- 4 input functions                    ; 4                                                                               ;
;     -- 3 input functions                    ; 230                                                                             ;
;     -- <=2 input functions                  ; 158                                                                             ;
;     -- Register only                        ; 226                                                                             ;
;                                             ;                                                                                 ;
; Logic elements by mode                      ;                                                                                 ;
;     -- normal mode                          ; 180                                                                             ;
;     -- arithmetic mode                      ; 212                                                                             ;
;                                             ;                                                                                 ;
; Total registers*                            ; 573 / 25,530 ( 2 % )                                                            ;
;     -- Dedicated logic registers            ; 573 / 24,860 ( 2 % )                                                            ;
;     -- I/O registers                        ; 0 / 670 ( 0 % )                                                                 ;
;                                             ;                                                                                 ;
; Total LABs:  partially or completely used   ; 72 / 1,539 ( 5 % )                                                              ;
; User inserted logic elements                ; 0                                                                               ;
; Virtual pins                                ; 0                                                                               ;
; I/O pins                                    ; 15 / 149 ( 10 % )                                                               ;
;     -- Clock pins                           ; 1 / 8 ( 13 % )                                                                  ;
;     -- Dedicated input pins                 ; 0 / 9 ( 0 % )                                                                   ;
; Global signals                              ; 4                                                                               ;
; M9Ks                                        ; 12 / 66 ( 18 % )                                                                ;
; Total memory bits                           ; 76,032 / 608,256 ( 13 % )                                                       ;
; Total RAM block bits                        ; 110,592 / 608,256 ( 18 % )                                                      ;
; Embedded Multiplier 9-bit elements          ; 6 / 132 ( 5 % )                                                                 ;
; PLLs                                        ; 1 / 4 ( 25 % )                                                                  ;
; Global clocks                               ; 4 / 20 ( 20 % )                                                                 ;
; Impedance control blocks                    ; 0 / 4 ( 0 % )                                                                   ;
; Average interconnect usage                  ; 1%                                                                              ;
; Peak interconnect usage                     ; 6%                                                                              ;
; Maximum fan-out node                        ; altpll0:inst6|altpll:altpll_component|altpll_ena1:auto_generated|clk[0]~clkctrl ;
; Maximum fan-out                             ; 481                                                                             ;
; Highest non-global fan-out signal           ; FIRInterp:inst8|TapCnt[0]                                                       ;
; Highest non-global fan-out                  ; 87                                                                              ;
; Total fan-out                               ; 3307                                                                            ;
; Average fan-out                             ; 2.73                                                                            ;
+---------------------------------------------+---------------------------------------------------------------------------------+
*  Register count does not include registers inside RAM blocks or DSP blocks.



+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Input Pins                                                                                                                                                                                                                                                                 ;
+-------+-------+----------+--------------+--------------+--------------+-----------------------+--------------------+--------+----------------+---------------+-----------------+----------+--------------+--------------+---------------------------+----------------------+
; Name  ; Pin # ; I/O Bank ; X coordinate ; Y coordinate ; Z coordinate ; Combinational Fan-Out ; Registered Fan-Out ; Global ; Input Register ; Power Up High ; PCI I/O Enabled ; Bus Hold ; Weak Pull Up ; I/O Standard ; Termination Control Block ; Location assigned by ;
+-------+-------+----------+--------------+--------------+--------------+-----------------------+--------------------+--------+----------------+---------------+-----------------+----------+--------------+--------------+---------------------------+----------------------+
; RstN  ; 218   ; 8        ; 20           ; 34           ; 6            ; 529                   ; 0                  ; yes    ; no             ; no            ; yes             ; no       ; Off          ; 2.5 V        ; --                        ; User                 ;
; clkin ; 31    ; 1        ; 0            ; 16           ; 0            ; 1                     ; 0                  ; no     ; no             ; no            ; yes             ; no       ; Off          ; 2.5 V        ; --                        ; User                 ;
+-------+---