dds_v.sdo

基于FPGA的DDS算法的实现

        (IOPATH datab regin (458:458:458) (458:458:458))
        (IOPATH cin regin (578:578:578) (578:578:578))
        (IOPATH cin0 regin (489:489:489) (489:489:489))
        (IOPATH cin1 regin (497:497:497) (497:497:497))
        (IOPATH dataa cout0 (443:443:443) (443:443:443))
        (IOPATH datab cout0 (344:344:344) (344:344:344))
        (IOPATH cin0 cout0 (58:58:58) (58:58:58))
        (IOPATH dataa cout1 (451:451:451) (451:451:451))
        (IOPATH datab cout1 (341:341:341) (341:341:341))
        (IOPATH cin1 cout1 (60:60:60) (60:60:60))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE acc0\|altaccumulate_component\|accum_cell\|acc_cella\[12\]\~I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (7188:7188:7188) (7188:7188:7188))
        (PORT clk (2193:2193:2193) (2193:2193:2193))
        (PORT ena (2014:2014:2014) (2014:2014:2014))
        (IOPATH (posedge clk) regout (156:156:156) (156:156:156))
        (IOPATH (posedge aclr) regout (176:176:176) (176:176:176))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (10:10:10))
      (SETUP ena (posedge clk) (10:10:10))
      (HOLD datain (posedge clk) (100:100:100))
      (HOLD ena (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE acc0\|altaccumulate_component\|accum_cell\|acc_cella\[13\]\~I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (2607:2607:2607) (2607:2607:2607))
        (PORT datab (520:520:520) (520:520:520))
        (PORT cin (0:0:0) (0:0:0))
        (PORT cin0 (0:0:0) (0:0:0))
        (PORT cin1 (0:0:0) (0:0:0))
        (IOPATH dataa regin (539:539:539) (539:539:539))
        (IOPATH datab regin (458:458:458) (458:458:458))
        (IOPATH cin regin (578:578:578) (578:578:578))
        (IOPATH cin0 regin (489:489:489) (489:489:489))
        (IOPATH cin1 regin (497:497:497) (497:497:497))
        (IOPATH dataa cout0 (443:443:443) (443:443:443))
        (IOPATH datab cout0 (344:344:344) (344:344:344))
        (IOPATH cin0 cout0 (58:58:58) (58:58:58))
        (IOPATH dataa cout1 (451:451:451) (451:451:451))
        (IOPATH datab cout1 (341:341:341) (341:341:341))
        (IOPATH cin1 cout1 (60:60:60) (60:60:60))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE acc0\|altaccumulate_component\|accum_cell\|acc_cella\[13\]\~I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (7188:7188:7188) (7188:7188:7188))
        (PORT clk (2193:2193:2193) (2193:2193:2193))
        (PORT ena (2014:2014:2014) (2014:2014:2014))
        (IOPATH (posedge clk) regout (156:156:156) (156:156:156))
        (IOPATH (posedge aclr) regout (176:176:176) (176:176:176))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (10:10:10))
      (SETUP ena (posedge clk) (10:10:10))
      (HOLD datain (posedge clk) (100:100:100))
      (HOLD ena (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE acc0\|altaccumulate_component\|accum_cell\|acc_cella\[14\]\~I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (404:404:404) (404:404:404))
        (PORT datab (1452:1452:1452) (1452:1452:1452))
        (PORT cin (0:0:0) (0:0:0))
        (PORT cin0 (0:0:0) (0:0:0))
        (PORT cin1 (0:0:0) (0:0:0))
        (IOPATH dataa regin (539:539:539) (539:539:539))
        (IOPATH datab regin (458:458:458) (458:458:458))
        (IOPATH cin regin (578:578:578) (578:578:578))
        (IOPATH cin0 regin (489:489:489) (489:489:489))
        (IOPATH cin1 regin (497:497:497) (497:497:497))
        (IOPATH dataa cout0 (443:443:443) (443:443:443))
        (IOPATH datab cout0 (344:344:344) (344:344:344))
        (IOPATH cin0 cout0 (58:58:58) (58:58:58))
        (IOPATH dataa cout1 (451:451:451) (451:451:451))
        (IOPATH datab cout1 (341:341:341) (341:341:341))
        (IOPATH cin1 cout1 (60:60:60) (60:60:60))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE acc0\|altaccumulate_component\|accum_cell\|acc_cella\[14\]\~I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (7188:7188:7188) (7188:7188:7188))
        (PORT clk (2193:2193:2193) (2193:2193:2193))
        (PORT ena (2014:2014:2014) (2014:2014:2014))
        (IOPATH (posedge clk) regout (156:156:156) (156:156:156))
        (IOPATH (posedge aclr) regout (176:176:176) (176:176:176))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (10:10:10))
      (SETUP ena (posedge clk) (10:10:10))
      (HOLD datain (posedge clk) (100:100:100))
      (HOLD ena (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE acc0\|altaccumulate_component\|accum_cell\|acc_cella\[15\]\~I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (1516:1516:1516) (1516:1516:1516))
        (PORT datab (385:385:385) (385:385:385))
        (PORT cin (0:0:0) (0:0:0))
        (PORT cin0 (0:0:0) (0:0:0))
        (PORT cin1 (0:0:0) (0:0:0))
        (IOPATH dataa regin (539:539:539) (539:539:539))
        (IOPATH datab regin (458:458:458) (458:458:458))
        (IOPATH cin regin (578:578:578) (578:578:578))
        (IOPATH cin0 regin (489:489:489) (489:489:489))
        (IOPATH cin1 regin (497:497:497) (497:497:497))
        (IOPATH dataa cout (610:610:610) (610:610:610))
        (IOPATH datab cout (502:502:502) (502:502:502))
        (IOPATH cin cout (142:142:142) (142:142:142))
        (IOPATH cin0 cout (214:214:214) (214:214:214))
        (IOPATH cin1 cout (198:198:198) (198:198:198))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE acc0\|altaccumulate_component\|accum_cell\|acc_cella\[15\]\~I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (7188:7188:7188) (7188:7188:7188))
        (PORT clk (2193:2193:2193) (2193:2193:2193))
        (PORT ena (2014:2014:2014) (2014:2014:2014))
        (IOPATH (posedge clk) regout (156:156:156) (156:156:156))
        (IOPATH (posedge aclr) regout (176:176:176) (176:176:176))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (10:10:10))
      (SETUP ena (posedge clk) (10:10:10))
      (HOLD datain (posedge clk) (100:100:100))
      (HOLD ena (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_io")
    (INSTANCE phi_inc_i\[19\]\~I.inst1)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1087:1087:1087) (1087:1087:1087))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_io")
    (INSTANCE phi_inc_i\[18\]\~I.inst1)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1087:1087:1087) (1087:1087:1087))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_io")
    (INSTANCE phi_inc_i\[17\]\~I.inst1)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1087:1087:1087) (1087:1087:1087))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_io")
    (INSTANCE phi_inc_i\[16\]\~I.inst1)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1087:1087:1087) (1087:1087:1087))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE acc0\|altaccumulate_component\|accum_cell\|acc_cella\[16\]\~I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (2649:2649:2649) (2649:2649:2649))
        (PORT datab (384:384:384) (384:384:384))
        (PORT cin (0:0:0) (0:0:0))
        (IOPATH dataa regin (539:539:539) (539:539:539))
        (IOPATH datab regin (458:458:458) (458:458:458))
        (IOPATH cin regin (598:598:598) (598:598:598))
        (IOPATH dataa cout0 (443:443:443) (443:443:443))
        (IOPATH datab cout0 (344:344:344) (344:344:344))
        (IOPATH dataa cout1 (451:451:451) (451:451:451))
        (IOPATH datab cout1 (341:341:341) (341:341:341))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE acc0\|altaccumulate_component\|accum_cell\|acc_cella\[16\]\~I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (7186:7186:7186) (7186:7186:7186))
        (PORT clk (2191:2191:2191) (2191:2191:2191))
        (PORT ena (2031:2031:2031) (2031:2031:2031))
        (IOPATH (posedge clk) regout (156:156:156) (156:156:156))
        (IOPATH (posedge aclr) regout (176:176:176) (176:176:176))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (10:10:10))
      (SETUP ena (posedge clk) (10:10:10))
      (HOLD datain (posedge clk) (100:100:100))
      (HOLD ena (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE acc0\|altaccumulate_component\|accum_cell\|acc_cella\[17\]\~I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (1547:1547:1547) (1547:1547:1547))
        (PORT datab (378:378:378) (378:378:378))
        (PORT cin (0:0:0) (0:0:0))
        (PORT cin0 (0:0:0) (0:0:0))
        (PORT cin1 (0:0:0) (0:0:0))
        (IOPATH dataa regin (539:539:539) (539:539:539))
        (IOPATH datab regin (458:458:458) (458:458:458))
        (IOPATH cin regin (598:598:598) (598:598:598))
        (IOPATH cin0 regin (489:489:489) (489:489:489))
        (IOPATH cin1 regin (497:497:497) (497:497:497))
        (IOPATH dataa cout0 (443:443:443) (443:443:443))
        (IOPATH datab cout0 (344:344:344) (344:344:344))
        (IOPATH cin0 cout0 (58:58:58) (58:58:58))
        (IOPATH dataa cout1 (451:451:451) (451:451:451))
        (IOPATH datab cout1 (341:341:341) (341:341:341))
        (IOPATH cin1 cout1 (60:60:60) (60:60:60))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE acc0\|altaccumulate_component\|accum_cell\|acc_cella\[17\]\~I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (7186:7186:7186) (7186:7186:7186))
        (PORT clk (2191:2191:2191) (2191:2191:2191))
        (PORT ena (2031:2031:2031) (2031:2031:2031))
        (IOPATH (posedge clk) regout (156:156:156) (156:156:156))
        (IOPATH (posedge aclr) regout (176:176:176) (176:176:176))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (10:10:10))
      (SETUP ena (posedge clk) (10:10:10))
      (HOLD datain (posedge clk) (100:100:100))
      (HOLD ena (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE acc0\|altaccumulate_component\|accum_cell\|acc_cella\[18\]\~I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (403:403:403) (403:403:403))
        (PORT datab (1526:1526:1526) (1526:1526:1526))
        (PORT cin (0:0:0) (0:0:0))
        (PORT cin0 (0:0:0) (0:0:0))
        (PORT cin1 (0:0:0) (0:0:0))
        (IOPATH dataa regin (539:539:539) (539:539:539))
        (IOPATH datab regin (458:458:458) (458:458:458))
        (IOPATH cin regin (598:598:598) (598:598:598))
        (IOPATH cin0 regin (489:489:489) (489:489:489))
        (IOPATH cin1 regin (497:497:497) (497:497:497))
        (IOPATH dataa cout0 (443:443:443) (443:443:443))
        (IOPATH datab cout0 (344:344:344) (344:344:344))
        (IOPATH cin0 cout0 (58:58:58) (58:58:58))
        (IOPATH dataa cout1 (451:451:451) (451:451:451))
        (IOPATH datab cout1 (341:341:341) (341:341:341))
        (IOPATH cin1 cout1 (60:60:60) (60:60:60))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE acc0\|altaccumulate_component\|accum_cell\|acc_cella\[18\]\~I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (7186:7186:7186) (7186:7186:7186))
        (PORT clk (2191:2191:2191) (2191:2191:2191))
        (PORT ena (2031:2031:2031) (2031:2031:2031))
        (IOPATH (posedge clk) regout (156:156:156) (156:156:156))
        (IOPATH (posedge aclr) regout (176:176:176) (176:176:176))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (10:10:10))
      (SETUP ena (posedge clk) (10:10:10))
      (HOLD datain (posedge clk) (100:100:100))
      (HOLD ena (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE acc0\|altaccumulate_component\|accum_cell\|acc_cella\[19\]\~I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (396:396:396) (396:396:396))
        (PORT datab (1544:1544:1544) (1544:1544:1544))
        (PORT cin (0:0:0) (0:0:0))
        (PORT cin0 (0:0:0) (0:0:0))
        (PORT cin1 (0:0:0) (0:0:0))
        (IOPATH dataa regin (539:539:539) (539:539:539))
        (IOPATH datab regin (458:458:458) (458:458:458))
        (IOPATH cin regin (598:598:598) (598:598:598))
        (IOPATH cin0 regin (489:489:489) (489:489:489))
        (IOPATH cin1 regin (497:497:497) (497:497:497))
        (IOPATH dataa cout0 (443:443:443) (443:443:443))
        (IOPATH datab cout0 (344:344:344) (344:344:344))
        (IOPATH cin0 cout0 (58:58:58) (58:58:58))
        (IOPATH dataa cout1 (451:451:451) (451:451:451))
        (IOPATH datab cout1 (341:341:341) (341:341:341))
        (IOPATH cin1 cout1 (60:60:60) (60:60:60))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE acc0\|altaccumulate_component\|accum_cell\|acc_cella\[19\]\~I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (7186:7186:7186) (7186:7186:7186))
        (PORT clk (2191:2191:2191) (2191:2191:2191))
        (PORT ena (2031:2031:2031) (2031:2031:2031))
        (IOPATH (posedge clk) regout (156:156:156) (156:156:156))
        (IOPATH (posedge aclr) regout (176:176:176) (176:176:176))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (10:10:10))
      (SETUP ena (posedge clk) (10:10:10))
      (HOLD datain (posedge clk) (100:100:100))
      (HOLD ena (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE acc0\|altaccumulate_component\|accum_cell\|acc_cella\[20\]\~I.lecomb)
    (DELAY
      (ABSOLUTE