dds_v.sdo

基于FPGA的DDS算法的实现

    (DELAY
      (ABSOLUTE
        (PORT dataa (1493:1493:1493) (1493:1493:1493))
        (PORT datab (379:379:379) (379:379:379))
        (PORT cin (0:0:0) (0:0:0))
        (PORT cin0 (0:0:0) (0:0:0))
        (PORT cin1 (0:0:0) (0:0:0))
        (IOPATH dataa regin (539:539:539) (539:539:539))
        (IOPATH datab regin (458:458:458) (458:458:458))
        (IOPATH cin regin (578:578:578) (578:578:578))
        (IOPATH cin0 regin (489:489:489) (489:489:489))
        (IOPATH cin1 regin (497:497:497) (497:497:497))
        (IOPATH dataa cout (610:610:610) (610:610:610))
        (IOPATH datab cout (502:502:502) (502:502:502))
        (IOPATH cin cout (142:142:142) (142:142:142))
        (IOPATH cin0 cout (214:214:214) (214:214:214))
        (IOPATH cin1 cout (198:198:198) (198:198:198))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE acc0\|altaccumulate_component\|accum_cell\|acc_cella\[5\]\~I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (7189:7189:7189) (7189:7189:7189))
        (PORT clk (2194:2194:2194) (2194:2194:2194))
        (PORT ena (1985:1985:1985) (1985:1985:1985))
        (IOPATH (posedge clk) regout (156:156:156) (156:156:156))
        (IOPATH (posedge aclr) regout (176:176:176) (176:176:176))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (10:10:10))
      (SETUP ena (posedge clk) (10:10:10))
      (HOLD datain (posedge clk) (100:100:100))
      (HOLD ena (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_io")
    (INSTANCE phi_inc_i\[9\]\~I.inst1)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1087:1087:1087) (1087:1087:1087))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_io")
    (INSTANCE phi_inc_i\[8\]\~I.inst1)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1087:1087:1087) (1087:1087:1087))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_io")
    (INSTANCE phi_inc_i\[7\]\~I.inst1)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1087:1087:1087) (1087:1087:1087))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_io")
    (INSTANCE phi_inc_i\[6\]\~I.inst1)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1087:1087:1087) (1087:1087:1087))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE acc0\|altaccumulate_component\|accum_cell\|acc_cella\[6\]\~I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (2324:2324:2324) (2324:2324:2324))
        (PORT datab (384:384:384) (384:384:384))
        (PORT cin (0:0:0) (0:0:0))
        (IOPATH dataa regin (539:539:539) (539:539:539))
        (IOPATH datab regin (458:458:458) (458:458:458))
        (IOPATH cin regin (598:598:598) (598:598:598))
        (IOPATH dataa cout0 (443:443:443) (443:443:443))
        (IOPATH datab cout0 (344:344:344) (344:344:344))
        (IOPATH dataa cout1 (451:451:451) (451:451:451))
        (IOPATH datab cout1 (341:341:341) (341:341:341))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE acc0\|altaccumulate_component\|accum_cell\|acc_cella\[6\]\~I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (7188:7188:7188) (7188:7188:7188))
        (PORT clk (2193:2193:2193) (2193:2193:2193))
        (PORT ena (2014:2014:2014) (2014:2014:2014))
        (IOPATH (posedge clk) regout (156:156:156) (156:156:156))
        (IOPATH (posedge aclr) regout (176:176:176) (176:176:176))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (10:10:10))
      (SETUP ena (posedge clk) (10:10:10))
      (HOLD datain (posedge clk) (100:100:100))
      (HOLD ena (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE acc0\|altaccumulate_component\|accum_cell\|acc_cella\[7\]\~I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (2168:2168:2168) (2168:2168:2168))
        (PORT datab (372:372:372) (372:372:372))
        (PORT cin (0:0:0) (0:0:0))
        (PORT cin0 (0:0:0) (0:0:0))
        (PORT cin1 (0:0:0) (0:0:0))
        (IOPATH dataa regin (539:539:539) (539:539:539))
        (IOPATH datab regin (458:458:458) (458:458:458))
        (IOPATH cin regin (598:598:598) (598:598:598))
        (IOPATH cin0 regin (489:489:489) (489:489:489))
        (IOPATH cin1 regin (497:497:497) (497:497:497))
        (IOPATH dataa cout0 (443:443:443) (443:443:443))
        (IOPATH datab cout0 (344:344:344) (344:344:344))
        (IOPATH cin0 cout0 (58:58:58) (58:58:58))
        (IOPATH dataa cout1 (451:451:451) (451:451:451))
        (IOPATH datab cout1 (341:341:341) (341:341:341))
        (IOPATH cin1 cout1 (60:60:60) (60:60:60))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE acc0\|altaccumulate_component\|accum_cell\|acc_cella\[7\]\~I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (7188:7188:7188) (7188:7188:7188))
        (PORT clk (2193:2193:2193) (2193:2193:2193))
        (PORT ena (2014:2014:2014) (2014:2014:2014))
        (IOPATH (posedge clk) regout (156:156:156) (156:156:156))
        (IOPATH (posedge aclr) regout (176:176:176) (176:176:176))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (10:10:10))
      (SETUP ena (posedge clk) (10:10:10))
      (HOLD datain (posedge clk) (100:100:100))
      (HOLD ena (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE acc0\|altaccumulate_component\|accum_cell\|acc_cella\[8\]\~I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (403:403:403) (403:403:403))
        (PORT datab (2601:2601:2601) (2601:2601:2601))
        (PORT cin (0:0:0) (0:0:0))
        (PORT cin0 (0:0:0) (0:0:0))
        (PORT cin1 (0:0:0) (0:0:0))
        (IOPATH dataa regin (539:539:539) (539:539:539))
        (IOPATH datab regin (458:458:458) (458:458:458))
        (IOPATH cin regin (598:598:598) (598:598:598))
        (IOPATH cin0 regin (489:489:489) (489:489:489))
        (IOPATH cin1 regin (497:497:497) (497:497:497))
        (IOPATH dataa cout0 (443:443:443) (443:443:443))
        (IOPATH datab cout0 (344:344:344) (344:344:344))
        (IOPATH cin0 cout0 (58:58:58) (58:58:58))
        (IOPATH dataa cout1 (451:451:451) (451:451:451))
        (IOPATH datab cout1 (341:341:341) (341:341:341))
        (IOPATH cin1 cout1 (60:60:60) (60:60:60))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE acc0\|altaccumulate_component\|accum_cell\|acc_cella\[8\]\~I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (7188:7188:7188) (7188:7188:7188))
        (PORT clk (2193:2193:2193) (2193:2193:2193))
        (PORT ena (2014:2014:2014) (2014:2014:2014))
        (IOPATH (posedge clk) regout (156:156:156) (156:156:156))
        (IOPATH (posedge aclr) regout (176:176:176) (176:176:176))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (10:10:10))
      (SETUP ena (posedge clk) (10:10:10))
      (HOLD datain (posedge clk) (100:100:100))
      (HOLD ena (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE acc0\|altaccumulate_component\|accum_cell\|acc_cella\[9\]\~I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (391:391:391) (391:391:391))
        (PORT datab (2036:2036:2036) (2036:2036:2036))
        (PORT cin (0:0:0) (0:0:0))
        (PORT cin0 (0:0:0) (0:0:0))
        (PORT cin1 (0:0:0) (0:0:0))
        (IOPATH dataa regin (539:539:539) (539:539:539))
        (IOPATH datab regin (458:458:458) (458:458:458))
        (IOPATH cin regin (598:598:598) (598:598:598))
        (IOPATH cin0 regin (489:489:489) (489:489:489))
        (IOPATH cin1 regin (497:497:497) (497:497:497))
        (IOPATH dataa cout0 (443:443:443) (443:443:443))
        (IOPATH datab cout0 (344:344:344) (344:344:344))
        (IOPATH cin0 cout0 (58:58:58) (58:58:58))
        (IOPATH dataa cout1 (451:451:451) (451:451:451))
        (IOPATH datab cout1 (341:341:341) (341:341:341))
        (IOPATH cin1 cout1 (60:60:60) (60:60:60))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE acc0\|altaccumulate_component\|accum_cell\|acc_cella\[9\]\~I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (7188:7188:7188) (7188:7188:7188))
        (PORT clk (2193:2193:2193) (2193:2193:2193))
        (PORT ena (2014:2014:2014) (2014:2014:2014))
        (IOPATH (posedge clk) regout (156:156:156) (156:156:156))
        (IOPATH (posedge aclr) regout (176:176:176) (176:176:176))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (10:10:10))
      (SETUP ena (posedge clk) (10:10:10))
      (HOLD datain (posedge clk) (100:100:100))
      (HOLD ena (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE acc0\|altaccumulate_component\|accum_cell\|acc_cella\[10\]\~I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (404:404:404) (404:404:404))
        (PORT datab (1482:1482:1482) (1482:1482:1482))
        (PORT cin (0:0:0) (0:0:0))
        (PORT cin0 (0:0:0) (0:0:0))
        (PORT cin1 (0:0:0) (0:0:0))
        (IOPATH dataa regin (539:539:539) (539:539:539))
        (IOPATH datab regin (458:458:458) (458:458:458))
        (IOPATH cin regin (598:598:598) (598:598:598))
        (IOPATH cin0 regin (489:489:489) (489:489:489))
        (IOPATH cin1 regin (497:497:497) (497:497:497))
        (IOPATH dataa cout (524:524:524) (524:524:524))
        (IOPATH datab cout (443:443:443) (443:443:443))
        (IOPATH cin cout (98:98:98) (98:98:98))
        (IOPATH cin0 cout (130:130:130) (130:130:130))
        (IOPATH cin1 cout (118:118:118) (118:118:118))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE acc0\|altaccumulate_component\|accum_cell\|acc_cella\[10\]\~I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (7188:7188:7188) (7188:7188:7188))
        (PORT clk (2193:2193:2193) (2193:2193:2193))
        (PORT ena (2014:2014:2014) (2014:2014:2014))
        (IOPATH (posedge clk) regout (156:156:156) (156:156:156))
        (IOPATH (posedge aclr) regout (176:176:176) (176:176:176))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (10:10:10))
      (SETUP ena (posedge clk) (10:10:10))
      (HOLD datain (posedge clk) (100:100:100))
      (HOLD ena (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_io")
    (INSTANCE phi_inc_i\[14\]\~I.inst1)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1087:1087:1087) (1087:1087:1087))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_io")
    (INSTANCE phi_inc_i\[13\]\~I.inst1)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1087:1087:1087) (1087:1087:1087))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_io")
    (INSTANCE phi_inc_i\[12\]\~I.inst1)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1087:1087:1087) (1087:1087:1087))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_io")
    (INSTANCE phi_inc_i\[11\]\~I.inst1)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1087:1087:1087) (1087:1087:1087))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE acc0\|altaccumulate_component\|accum_cell\|acc_cella\[11\]\~I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (547:547:547) (547:547:547))
        (PORT datab (2038:2038:2038) (2038:2038:2038))
        (PORT cin (0:0:0) (0:0:0))
        (IOPATH dataa regin (539:539:539) (539:539:539))
        (IOPATH datab regin (458:458:458) (458:458:458))
        (IOPATH cin regin (578:578:578) (578:578:578))
        (IOPATH dataa cout0 (443:443:443) (443:443:443))
        (IOPATH datab cout0 (344:344:344) (344:344:344))
        (IOPATH dataa cout1 (451:451:451) (451:451:451))
        (IOPATH datab cout1 (341:341:341) (341:341:341))
      )
    )
  )
  (CELL
    (CELLTYPE "stratix_lcell_register")
    (INSTANCE acc0\|altaccumulate_component\|accum_cell\|acc_cella\[11\]\~I.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (7188:7188:7188) (7188:7188:7188))
        (PORT clk (2193:2193:2193) (2193:2193:2193))
        (PORT ena (2014:2014:2014) (2014:2014:2014))
        (IOPATH (posedge clk) regout (156:156:156) (156:156:156))
        (IOPATH (posedge aclr) regout (176:176:176) (176:176:176))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (10:10:10))
      (SETUP ena (posedge clk) (10:10:10))
      (HOLD datain (posedge clk) (100:100:100))
      (HOLD ena (posedge clk) (100:100:100))
    )
  )
  (CELL
    (CELLTYPE "stratix_asynch_lcell")
    (INSTANCE acc0\|altaccumulate_component\|accum_cell\|acc_cella\[12\]\~I.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (1524:1524:1524) (1524:1524:1524))
        (PORT datab (383:383:383) (383:383:383))
        (PORT cin (0:0:0) (0:0:0))
        (PORT cin0 (0:0:0) (0:0:0))
        (PORT cin1 (0:0:0) (0:0:0))
        (IOPATH dataa regin (539:539:539) (539:539:539))