regkeys

来自「verilog code for 3 bit sequence detector」· 代码 · 共 7 行

CommandLine
D:/Xilinx/10.1/ISE/bin/nt/unwrapped/trce.exe -ise D:/Projects/verilog/New Folder/sequencedetector/sequencedetector.ise -intstyle ise -v 3 -s 4 -xml seqdet seqdet.ncd -o seqdet.twr seqdet.pcf -ucf seqdet.ucf
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FormatString
trce.exe ([-e|-v [<limit:0,2000000000>]] [-l <limit:0,2000000000>] [-n [<limit:0,2000000000>]] [-u [<limit:0,2000000000>]] [-skew] [-a] [--p] [-s <speed>] [-o <report[.twr]>] [--m] [-stamp <stampfile>] [-tsi <tsifile[.tsi]>] [-xml <report[.twx]>] [-nodatasheet] [-timegroups] [-fastpaths] [-intstyle ise|xflow|silent] [-ise <projectfile>] [--ucf <constraint[.ucf]>] <design[.ncd]> [<constraint[.pcf]>]) | ([-run <macro[.xtm]> [<design[.ncd]> [<constraint[.pcf]>]]] [-intstyle ise|xflow|silent] [-ise <projectfile>])
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