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📄 regkeys

📁 verilog code for 3 bit sequence detector
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prop_440_val"true"sprop_441_namePROP_XplorerOtherCmdLineOptionssprop_441_val""sprop_442_namePROP_PrecNumOfSumPathssprop_442_val"10"sprop_443_namePROP_PrecNumOfCriticalPathssprop_443_val"1"sprop_444_namePROP_mapTimingModesprop_444_val"Non Timing Driven"sprop_445_namePROP_xilxMapPackfactorsprop_445_val"100"sprop_446_namePROP_MapRetimingsprop_446_val"false"sprop_447_namePROP_MapEquivalentRegisterRemovalsprop_447_val"true"sprop_448_namePROP_xilxPAReffortLevelsprop_448_val"Standard"sprop_449_namePROP_parTimingModesprop_449_val"Performance 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Optimized"sprop_9_namePROP_BehavioralSimTopsprop_9_val"Module|test3"s

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