__projnav.log

vhdl code for GIF Image Viewer

WARNING:Xst:647 - Input <readdata<12>> is never used.
WARNING:Xst:647 - Input <readdata<11>> is never used.
WARNING:Xst:647 - Input <readdata<10>> is never used.
WARNING:Xst:647 - Input <readdata<9>> is never used.
WARNING:Xst:647 - Input <readdata<8>> is never used.
WARNING:Xst:646 - Signal <maxcolor10<9>> is assigned but never used.
WARNING:Xst:646 - Signal <maxcolor10<8>> is assigned but never used.
    Summary:
	inferred   2 Finite State Machine(s).
	inferred   3 Counter(s).
	inferred  20 D-type flip-flop(s).
	inferred   2 Adder/Subtracter(s).
	inferred   2 Comparator(s).
	inferred  20 Multiplexer(s).
	inferred  11 Tristate(s).
Unit <prgramdacver2> synthesized.


Synthesizing Unit <headers>.
    Related source file is E:/GIF.3.21m/headers.vhd.
    Found finite state machine <FSM_2> for signal <presstate>.
    -----------------------------------------------------------------------
    | States             | 26                                             |
    | Transitions        | 35                                             |
    | Inputs             | 7                                              |
    | Outputs            | 17                                             |
    | Reset type         | asynchronous                                   |
    | Encoding           | automatic                                      |
    | State register     | D  flip-flops                                  |
    -----------------------------------------------------------------------
WARNING:Xst:647 - Input <readdata<15>> is never used.
WARNING:Xst:647 - Input <readdata<14>> is never used.
WARNING:Xst:647 - Input <readdata<13>> is never used.
WARNING:Xst:647 - Input <readdata<12>> is never used.
WARNING:Xst:647 - Input <readdata<11>> is never used.
WARNING:Xst:647 - Input <readdata<10>> is never used.
WARNING:Xst:647 - Input <readdata<9>> is never used.
WARNING:Xst:647 - Input <readdata<8>> is never used.
    Summary:
	inferred   1 Finite State Machine(s).
Unit <headers> synthesized.


Synthesizing Unit <lzw>.
    Related source file is E:/GIF.3.21m/lzw.vhd.
WARNING:Xst:646 - Signal <reset4> is assigned but never used.
WARNING:Xst:646 - Signal <opout1> is assigned but never used.
    Register <opin2> equivalent to <cop4> has been removed
    Found finite state machine <FSM_3> for signal <state>.
    -----------------------------------------------------------------------
    | States             | 61                                             |
    | Transitions        | 75                                             |
    | Inputs             | 10                                             |
    | Outputs            | 21                                             |
    | Reset type         | asynchronous                                   |
    | Encoding           | automatic                                      |
    | State register     | D  flip-flops                                  |
    -----------------------------------------------------------------------
    Found 1-bit register for signal <wen>.
    Found 1-bit register for signal <done1>.
    Found 4-bit comparator equal for signal <$n0081> created at line 215.
    Found 12-bit comparator less for signal <$n0082> created at line 223.
    Found 12-bit comparator greater for signal <$n0085> created at line 225.
    Found 12-bit comparator equal for signal <$n0086> created at line 234.
    Found 12-bit comparator greater for signal <$n0088> created at line 262.
    Found 1-bit adder for signal <$n0110> created at line 159.
    Found 1-bit adder for signal <$n0111> created at line 160.
    Found 12-bit adder for signal <$n0112> created at line 161.
    Found 8-bit adder for signal <$n0113> created at line 162.
    Found 8-bit adder for signal <$n0114> created at line 167.
    Found 8-bit adder for signal <$n0115> created at line 169.
    Found 4-bit subtractor for signal <$n0116> created at line 215.
    Found 12-bit subtractor for signal <$n0117> created at line 234.
    Found 12-bit comparator greatequal for signal <$n0118> created at line 218.
    Found 12-bit comparator greatequal for signal <$n0119> created at line 218.
    Found 12-bit comparator greatequal for signal <$n0120> created at line 219.
    Found 12-bit comparator greatequal for signal <$n0121> created at line 220.
    Found 4-bit register for signal <codesizefix>.
    Found 2-bit register for signal <cop1>.
    Found 2-bit register for signal <cop2>.
    Found 2-bit register for signal <cop3>.
    Found 2-bit register for signal <cop4>.
    Found 2-bit register for signal <cop5>.
    Found 2-bit register for signal <cop6>.
    Found 2-bit register for signal <opin1>.
    Found 1-bit register for signal <opinstring>.
    Found 1-bit register for signal <opout2>.
    Found 1-bit register for signal <opout3>.
    Found 1-bit register for signal <opoutstring>.
    Found 1-bit register for signal <reset>.
    Found 1-bit register for signal <reset2>.
    Found 1-bit register for signal <reset3>.
    Found 1-bit register for signal <reset6>.
    Found 3-bit register for signal <seladdr>.
    Found 3-bit register for signal <seladdr2>.
    Found 3-bit register for signal <select1>.
WARNING:Xst:646 - Signal <tempdata<7>> is assigned but never used.
WARNING:Xst:646 - Signal <tempdata<6>> is assigned but never used.
WARNING:Xst:646 - Signal <tempdata<5>> is assigned but never used.
WARNING:Xst:646 - Signal <tempdata<4>> is assigned but never used.
WARNING:Xst:646 - Signal <tempdata<3>> is assigned but never used.
WARNING:Xst:646 - Signal <tempdata<2>> is assigned but never used.
WARNING:Xst:646 - Signal <tempdata<1>> is assigned but never used.
WARNING:Xst:646 - Signal <tempdata<0>> is assigned but never used.
WARNING:Xst:646 - Signal <pendwrdata1<15>> is assigned but never used.
WARNING:Xst:646 - Signal <pendwrdata1<14>> is assigned but never used.
WARNING:Xst:646 - Signal <pendwrdata1<13>> is assigned but never used.
WARNING:Xst:646 - Signal <pendwrdata1<12>> is assigned but never used.
WARNING:Xst:646 - Signal <pendwrdata1<11>> is assigned but never used.
WARNING:Xst:646 - Signal <pendwrdata1<10>> is assigned but never used.
WARNING:Xst:646 - Signal <pendwrdata1<9>> is assigned but never used.
WARNING:Xst:646 - Signal <pendwrdata1<8>> is assigned but never used.
WARNING:Xst:646 - Signal <pendwrdata1<7>> is assigned but never used.
WARNING:Xst:646 - Signal <pendwrdata1<6>> is assigned but never used.
WARNING:Xst:646 - Signal <pendwrdata1<5>> is assigned but never used.
WARNING:Xst:646 - Signal <pendwrdata1<4>> is assigned but never used.
WARNING:Xst:646 - Signal <pendwrdata1<3>> is assigned but never used.
WARNING:Xst:646 - Signal <pendwrdata1<2>> is assigned but never used.
WARNING:Xst:646 - Signal <pendwrdata1<1>> is assigned but never used.
WARNING:Xst:646 - Signal <pendwrdata1<0>> is assigned but never used.
    Summary:
	inferred   1 Finite State Machine(s).
	inferred  37 D-type flip-flop(s).
	inferred   8 Adder/Subtracter(s).
	inferred   9 Comparator(s).
Unit <lzw> synthesized.


Synthesizing Unit <gif>.
    Related source file is E:/GIF.3.21m/gif.vhd.
    Found finite state machine <FSM_4> for signal <presstate>.
    -----------------------------------------------------------------------
    | States             | 10                                             |
    | Transitions        | 15                                             |
    | Inputs             | 5                                              |
    | Outputs            | 5                                              |
    | Reset type         | asynchronous                                   |
    | Encoding           | automatic                                      |
    | State register     | D  flip-flops                                  |
    -----------------------------------------------------------------------
WARNING:Xst:737 - Found 2-bit latch for signal <memsel>.
    Found 1-bit register for signal <halfclk>.
    Found 1 1-bit 2-to-1 multiplexers.
WARNING:Xst:646 - Signal <vgareaddata<15>> is assigned but never used.
WARNING:Xst:646 - Signal <vgareaddata<14>> is assigned but never used.
WARNING:Xst:646 - Signal <vgareaddata<13>> is assigned but never used.
WARNING:Xst:646 - Signal <vgareaddata<12>> is assigned but never used.
WARNING:Xst:646 - Signal <vgareaddata<11>> is assigned but never used.
WARNING:Xst:646 - Signal <vgareaddata<10>> is assigned but never used.
WARNING:Xst:646 - Signal <vgareaddata<9>> is assigned but never used.
WARNING:Xst:646 - Signal <vgareaddata<8>> is assigned but never used.
WARNING:Xst:646 - Signal <vgareaddata<7>> is assigned but never used.
WARNING:Xst:646 - Signal <vgareaddata<6>> is assigned but never used.
WARNING:Xst:646 - Signal <vgareaddata<5>> is assigned but never used.
WARNING:Xst:646 - Signal <vgareaddata<4>> is assigned but never used.
WARNING:Xst:646 - Signal <vgareaddata<3>> is assigned but never used.
WARNING:Xst:646 - Signal <vgareaddata<2>> is assigned but never used.
WARNING:Xst:646 - Signal <vgareaddata<1>> is assigned but never used.
WARNING:Xst:646 - Signal <vgareaddata<0>> is assigned but never used.
WARNING:Xst:646 - Signal <codesize<3>> is assigned but never used.
WARNING:Xst:646 - Signal <codesize<2>> is assigned but never used.
WARNING:Xst:646 - Signal <codesize<1>> is assigned but never used.
WARNING:Xst:646 - Signal <codesize<0>> is assigned but never used.
    Summary:
	inferred   1 Finite State Machine(s).
	inferred   1 D-type flip-flop(s).
	inferred   2 Latch(s).
	inferred   1 Multiplexer(s).
Unit <gif> synthesized.

=========================================================================
HDL Synthesis Report

Macro Statistics
# FSMs                             : 5
# Registers                        : 68
  8-bit register                   : 4
  16-bit register                  : 5
  32-bit register                  : 6
  11-bit register                  : 1
  10-bit register                  : 1
  20-bit register                  : 3
  2-bit register                   : 9
  3-bit register                   : 3
  4-bit register                   : 2
  1-bit register                   : 34
# Latches                          : 3
  16-bit latch                     : 1
  20-bit latch                     : 1
  2-bit latch                      : 1
# Counters                         : 3
  3-bit up counter                 : 1
  2-bit up counter                 : 1
  8-bit up counter                 : 1
# Multiplexers                     : 13
  16-bit 5-to-1 multiplexer        : 1
  32-bit 4-to-1 multiplexer        : 2
  1-bit 4-to-1 multiplexer         : 2
  20-bit 4-to-1 multiplexer        : 1
  2-to-1 multiplexer               : 7
# Tristates                        : 4
  16-bit tristate buffer           : 2
  8-bit tristate buffer            : 1
  3-bit tristate buffer            : 1
# Decoders                         : 1
  1-of-8 decoder                   : 1
# Adders/Subtractors               : 35
  9-bit adder                      : 1
  32-bit adder                     : 6
  32-bit subtractor                : 6
  10-bit subtractor                : 3
  20-bit adder                     : 4
  11-bit adder                     : 1
  10-bit adder                     : 5
  1-bit adder                      : 2
  12-bit adder                     : 1
  8-bit adder                      : 4
  4-bit subtractor                 : 1
  12-bit subtractor                : 1
# Comparators                      : 26
  11-bit comparator greater        : 1
  10-bit comparator greater        : 1
  11-bit comparator greatequal     : 2
  11-bit comparator less           : 3
  10-bit comparator greatequal     : 2
  10-bit comparator less           : 3
  8-bit comparator equal           : 1
  3-bit comparator less            : 1
  4-bit comparator equal           : 1
  12-bit comparator less           : 4
  12-bit comparator equal          : 1
  12-bit comparator greater        : 2
  12-bit comparator greatequal     : 4

=========================================================================

Optimizing FSM <FSM_0> with Sequential encoding and D flip-flops.
Optimizing FSM <FSM_1> with One-Hot encoding and D flip-flops.
Optimizing FSM <FSM_2> with One-Hot encoding and D flip-flops.
Optimizing FSM <FSM_3> with One-Hot encoding and D flip-flops.
Optimizing FSM <FSM_4> with One-Hot encoding and D flip-flops.

Starting low level synthesis...
WARNING:Xst:524 - All outputs of the instance <reg3> of the block <reg> are unconnected in block <lzw>.
   This instance will be removed from the design along with all underlying logic
Optimizing unit <reg1> ...

Optimizing unit <mux2> ...

Optimizing unit <adder> ...

Optimizing unit <mux26> ...

Optimizing unit <mux6> ...

Optimizing unit <headers> ...

Optimizing unit <counter2> ...

Optimizing unit <counter20> ...

Optimizing unit <counter3> ...

Optimizing unit <counter> ...

Optimizing unit <register1> ...

Optimizing unit <register2> ...

Optimizing unit <reg> ...

Optimizing unit <mux5> ...

Optimizing unit <lzw> ...

Optimizing unit <vgacore> ...

Optimizing unit <gif> ...

Building and optimizing final netlist ...

Register inst_lzw_opin1_1 equivalent to inst_lzw_cop4_0 has been removed