memreadmux.vhd

vhdl code for GIF Image Viewer

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity memreadmux is
    Port (
        lAddr: out STD_LOGIC_VECTOR (18 downto 0);
        lData: inout STD_LOGIC_VECTOR (15 downto 0);
        lOEN: out STD_LOGIC;
        lWEN: out STD_LOGIC;
		  lCEN : out STD_LOGIC;

	     rAddr: out STD_LOGIC_VECTOR (18 downto 0);
        rData: inout STD_LOGIC_VECTOR (15 downto 0);
        rOEN: out STD_LOGIC;
        rWEN: out STD_LOGIC;
		  rCEN : out STD_LOGIC;

        paletteAddr: in STD_LOGIC_VECTOR (19 downto 0);
        paletteReadData: out STD_LOGIC_VECTOR (15 downto 0);
		  paletteWriteData : in STD_LOGIC_VECTOR(15 downto 0);
        paletteOEN: in STD_LOGIC;
        paletteWEN: in STD_LOGIC;

        lzwAddr: in STD_LOGIC_VECTOR (19 downto 0);
        lzwReadData: out STD_LOGIC_VECTOR (15 downto 0);
		  lzwWriteData : in STD_LOGIC_VECTOR(15 downto 0);
        lzwOEN: in STD_LOGIC;
        lzwWEN: in STD_LOGIC;
        
		  headersAddr: in STD_LOGIC_VECTOR (19 downto 0);
        headersReadData: out STD_LOGIC_VECTOR (15 downto 0);
		  headersWriteData : in STD_LOGIC_VECTOR(15 downto 0);
        headersOEN: in STD_LOGIC;
        headersWEN: in STD_LOGIC;
		  
		  vgaAddr : in STD_LOGIC_VECTOR(19 downto 0);
		  vgaReadData : out STD_LOGIC_VECTOR(15 downto 0);
		  vgaWriteData : in STD_LOGIC_VECTOR(15 downto 0);
		  vgaOEN : in STD_LOGIC;
		  vgaWEN : in STD_LOGIC;

		  sel : in STD_LOGIC_VECTOR(1 downto 0)
	 );
end memreadmux;

architecture Behavioral of memreadmux is
	constant CONST_CONNECT_PALETTE : STD_LOGIC_VECTOR(1 downto 0) := "00";
	constant CONST_CONNECT_LZW : STD_LOGIC_VECTOR(1 downto 0) := "01";
	constant CONST_CONNECT_HEADERS : STD_LOGIC_VECTOR(1 downto 0) := "10";
	constant CONST_CONNECT_VGA : STD_LOGIC_VECTOR(1 downto 0) := "11";
	
	signal OEN, WEN, lWENb, rWENb : std_logic;
	signal writeData, lreadData, rreadData, readData : std_logic_vector(15 downto 0);
	signal memAddr : std_logic_vector(19 downto 0);
	
begin

	lOEN <= OEN;
	rOEN <= OEN;

	lAddr <= memAddr(18 downto 0);
	rAddr <= memAddr(18 downto 0);

	with sel select
		OEN <= paletteOEN when CONST_CONNECT_PALETTE,
					 lzwOEN when CONST_CONNECT_LZW,
					 headersOEN when CONST_CONNECT_HEADERS,
					 vgaOEN when others;
	with sel select
		WEN <= paletteWEN when CONST_CONNECT_PALETTE,
					 lzwWEN when CONST_CONNECT_LZW,
					 headersWEN when CONST_CONNECT_HEADERS,
					 vgaWEN when others;
	with sel select
		memAddr <= paletteAddr when CONST_CONNECT_PALETTE,
					 lzwAddr when CONST_CONNECT_LZW,
					 headersAddr when CONST_CONNECT_HEADERS,
					 vgaAddr when others;
	with sel select
		writeData <= paletteWriteData when CONST_CONNECT_PALETTE,
					 lzwWriteData when CONST_CONNECT_LZW,
					 headersWriteData when CONST_CONNECT_HEADERS,
					 vgaWriteData when others;

	with lWENb select
		lData <= writeData when '0',
					(others => 'Z') when others;
	with rWENb select
		rData <= writeData when '0',
					(others => 'Z') when others;

	with WEN select
		lreadData <= lData when '1',
						 (others => '0') when others;
	with WEN select
		rreadData <= rData when '1',
						 (others => '0') when others;

	lCEN <= '0';
	rCEN <= '0';

	with memAddr(19) select
		readData <= lreadData when '0',
						rreadData when others;

	with memAddr(19) select
		lWENb <= WEN when '0',
				  '1' when others;

	with memAddr(19) select
		rWENb <= WEN when '1',
				  '1' when others;

	lWEN <= lWENb;
	rWEN <= rWENb;

	paletteReadData <= readData;
	lzwReadData <= readData;
	headersReadData <= readData;
	vgaReadData <= readData;

end Behavioral;