📄 dds.vhd
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--DDS.VHD
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY DDS IS
PORT(K : IN STD_LOGIC_VECTOR(9 DOWNTO 0);
EN : IN STD_LOGIC;
RESET : IN STD_LOGIC;
CLK : IN STD_LOGIC;
Q : OUT STD_LOGIC_VECTOR(8 DOWNTO 0));
END ENTITY DDS;
ARCHITECTURE ART OF DDS IS
COMPONENT SUM99 IS
PORT(K : IN STD_LOGIC_VECTOR(9 DOWNTO 0);
EN : IN STD_LOGIC;
RESET : IN STD_LOGIC;
CLK : IN STD_LOGIC;
OUT1 : OUT STD_LOGIC_VECTOR(9 DOWNTO 0));
END COMPONENT SUM99;
COMPONENT REG1 IS
PORT(D : IN STD_LOGIC_VECTOR(9 DOWNTO 0);
CLK : IN STD_LOGIC;
Q : OUT STD_LOGIC_VECTOR(9 DOWNTO 0));
END COMPONENT REG1;
COMPONENT ROM IS
PORT(CLK : IN STD_LOGIC;
ADDR : IN STD_LOGIC_VECTOR(9 DOWNTO 0);
OUTP : OUT STD_LOGIC_VECTOR(8 DOWNTO 0));
END COMPONENT ROM;
COMPONENT REG2 IS
PORT(D1: IN STD_LOGIC_VECTOR(8 DOWNTO 0);
CLK: IN STD_LOGIC;
Q: OUT STD_LOGIC_VECTOR(8 DOWNTO 0));
END COMPONENT REG2;
SIGNAL S1 : STD_LOGIC_VECTOR(9 DOWNTO 0);
SIGNAL S2 : STD_LOGIC_VECTOR(9 DOWNTO 0);
SIGNAL S3 : STD_LOGIC_VECTOR(8 DOWNTO 0);
BEGIN
U0 : sum99 PORT MAP (K =>K, EN =>EN,RESET =>RESET,CLK =>CLK,OUT1 =>S1);
U1 : REG1 PORT MAP (D =>S1,CLK =>CLK,Q =>S2);
U2 : ROM PORT MAP (ADDR =>S2,CLK=>CLK,OUTP =>S3);
U3 : REG2 PORT MAP (D1=>S3,CLK =>CLK,Q =>Q);
END ARCHiTECTURE ART;
--REG1.VHD
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY REG1 IS
PORT(D:IN STD_LOGIC_VECTOR(9 DOWNTO 0);
CLK : IN STD_LOGIC;
Q : OUT STD_LOGIC_VECTOR(9 DOWNTO 0));
END ENTITY REG1;
ARCHITECTURE ART OF REG1 IS
BEGIN
PROCESS (CLK)IS
BEGIN
IF(CLK'EVENT AND CLK='1') THEN
Q<=D;
END IF;
END PROCESS;
END ARCHITECTURE ART;
--SUM99.VHD
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY SUM99 IS
PORT(K:IN STD_LOGIC_VECTOR(9 DOWNTO 0);
CLK : IN STD_LOGIC;
EN : IN STD_LOGIC;
RESET : IN STD_LOGIC;
OUT1 : OUT STD_LOGIC_VECTOR(9 DOWNTO 0));
END ENTITY SUM99;
ARCHITECTURE ART OF SUM99 IS
SIGNAL TEMP:STD_LOGIC_VECTOR(9 DOWNTO 0);
BEGIN
PROCESS(CLK,EN,RESET) IS
BEGIN
IF RESET='1' THEN TEMP<="0000000000";
ELSE
IF CLK'EVENT AND CLK='1' THEN
IF EN= '1' THEN
TEMP<=TEMP+K;
END IF;
END IF;
END IF;
OUT1<=TEMP;
END PROCESS;
END ARCHITECTURE ART;
--REG2.VHD
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY REG2 IS
PORT(D1:IN STD_LOGIC_VECTOR(8 DOWNTO 0);
CLK : IN STD_LOGIC;
Q : OUT STD_LOGIC_VECTOR(8 DOWNTO 0));
END ENTITY REG2;
ARCHITECTURE ART OF REG2 IS
BEGIN
PROCESS (CLK)IS
BEGIN
IF(CLK'EVENT AND CLK='1') THEN
Q<=D1;
END IF;
END PROCESS;
END ARCHITECTURE ART;
--ROM.VHD
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY ROM IS
PORT (ADDR : IN STD_LOGIC_VECTOR(9 DOWNTO 0);
CLK : IN STD_LOGIC;
OUTP : OUT SIGNED (8 DOWNTO 0));
END ENTITY ROM;
ARCHITECTURE ART OF ROM IS
BEGIN
PROCESS (CLK) IS
BEGIN
IF (CLK'EVENT AND CLK='1') THEN
CASE ADDR IS
WHEN "0000000000" => OUTP <= "000000000";
WHEN "0000000001" => OUTP <= "000000010";
WHEN "0000000010" => OUTP <= "000000011";
WHEN "0000000011" => OUTP <= "000000101";
WHEN "0000000100" => OUTP <= "000000110";
WHEN "0000000101" => OUTP <= "000001000";
WHEN "0000000110" => OUTP <= "000001001";
WHEN "0000000111" => OUTP <= "000001011";
WHEN "0000001000" => OUTP <= "000001101";
WHEN "0000001001" => OUTP <= "000001110";
WHEN "0000001010" => OUTP <= "000010000";
WHEN "0000001011" => OUTP <= "000010001";
WHEN "0000001100" => OUTP <= "000010011";
WHEN "0000001101" => OUTP <= "000010100";
WHEN "0000001110" => OUTP <= "000010110";
WHEN "0000001111" => OUTP <= "000010111";
WHEN "0000010000" => OUTP <= "000011001";
WHEN "0000010001" => OUTP <= "000011011";
WHEN "0000010010" => OUTP <= "000011100";
WHEN "0000010011" => OUTP <= "000011110";
WHEN "0000010100" => OUTP <= "000011111";
WHEN "0000010101" => OUTP <= "000100001";
WHEN "0000010110" => OUTP <= "000100010";
WHEN "0000010111" => OUTP <= "000100100";
WHEN "0000011000" => OUTP <= "000100101";
WHEN "0000011001" => OUTP <= "000100111";
WHEN "0000011010" => OUTP <= "000101001";
WHEN "0000011011" => OUTP <= "000101010";
WHEN "0000011100" => OUTP <= "000101100";
WHEN "0000011101" => OUTP <= "000101101";
WHEN "0000011110" => OUTP <= "000101111";
WHEN "0000100000" => OUTP <= "000110000";
WHEN "0000100001" => OUTP <= "000110010";
WHEN "0000100010" => OUTP <= "000110011";
WHEN "0000100011" => OUTP <= "000110101";
WHEN "0000100100" => OUTP <= "000110110";
WHEN "0000100101" => OUTP <= "000111000";
WHEN "0000100110" => OUTP <= "000111001";
WHEN "0000100111" => OUTP <= "000111011";
WHEN "0000101000" => OUTP <= "000111100";
WHEN "0000101001" => OUTP <= "000111110";
WHEN "0000101010" => OUTP <= "000111111";
WHEN "0000101011" => OUTP <= "001000001";
WHEN "0000101100" => OUTP <= "001000011";
WHEN "0000101101" => OUTP <= "001000100";
WHEN "0000101110" => OUTP <= "001000110";
WHEN "0000101111" => OUTP <= "001000111";
WHEN "0000110000" => OUTP <= "001001001";
WHEN "0000110001" => OUTP <= "001001010";
WHEN "0000110010" => OUTP <= "001001100";
WHEN "0000110011" => OUTP <= "001001101";
WHEN "0000110100" => OUTP <= "001001111";
WHEN "0000110101" => OUTP <= "001010000";
WHEN "0000110110" => OUTP <= "001010001";
WHEN "0000110111" => OUTP <= "001010011";
WHEN "0000111000" => OUTP <= "001010100";
WHEN "0000111001" => OUTP <= "001010110";
WHEN "0000111010" => OUTP <= "001010111";
WHEN "0000111011" => OUTP <= "001011001";
WHEN "0000111100" => OUTP <= "001011010";
WHEN "0000111101" => OUTP <= "001011100";
WHEN "0000111110" => OUTP <= "001011101";
WHEN "0000111111" => OUTP <= "001011111";
WHEN "0001000000" => OUTP <= "001100000";
WHEN "0001000001" => OUTP <= "001100010";
WHEN "0001000010" => OUTP <= "001100011";
WHEN "0001000011" => OUTP <= "001100100";
WHEN "0001000100" => OUTP <= "001100110";
WHEN "0001000101" => OUTP <= "001100111";
WHEN "0001000110" => OUTP <= "001101001";
WHEN "0001000111" => OUTP <= "001101010";
WHEN "0001001000" => OUTP <= "001101100";
WHEN "0001001001" => OUTP <= "001101101";
WHEN "0001001010" => OUTP <= "001101111";
WHEN "0001001011" => OUTP <= "001110000";
WHEN "0001001100" => OUTP <= "001110001";
WHEN "0001001101" => OUTP <= "001110011";
WHEN "0001001110" => OUTP <= "001110100";
WHEN "0001001111" => OUTP <= "001110101";
WHEN "0001010000" => OUTP <= "001110111";
WHEN "0001010001" => OUTP <= "001111000";
WHEN "0001010010" => OUTP <= "001111010";
WHEN "0001010011" => OUTP <= "001111011";
WHEN "0001010100" => OUTP <= "001111100";
WHEN "0001010101" => OUTP <= "001111110";
WHEN "0001010110" => OUTP <= "001111111";
WHEN "0001010111" => OUTP <= "010000000";
WHEN "0001011000" => OUTP <= "010000010";
WHEN "0001011001" => OUTP <= "010000011";
WHEN "0001011010" => OUTP <= "010000100";
WHEN "0001011011" => OUTP <= "010000110";
WHEN "0001011100" => OUTP <= "010000111";
WHEN "0001011101" => OUTP <= "010001000";
WHEN "0001011110" => OUTP <= "010001010";
WHEN "0001011111" => OUTP <= "010001011";
WHEN "0001100000" => OUTP <= "010001100";
WHEN "0001100001" => OUTP <= "010001110";
WHEN "0001100010" => OUTP <= "010001111";
WHEN "0001100011" => OUTP <= "010010000";
WHEN "0001100100" => OUTP <= "010010010";
WHEN "0001100101" => OUTP <= "010010011";
WHEN "0001100110" => OUTP <= "010010100";
WHEN "0001100111" => OUTP <= "010010101";
WHEN "0001101000" => OUTP <= "010010111";
WHEN "0001101001" => OUTP <= "010011000";
WHEN "0001101010" => OUTP <= "010011001";
WHEN "0001101011" => OUTP <= "010011010";
WHEN "0001101100" => OUTP <= "010011100";
WHEN "0001101101" => OUTP <= "010011101";
WHEN "0001101110" => OUTP <= "010011110";
WHEN "0001101111" => OUTP <= "010011111";
WHEN "0001110000" => OUTP <= "010100001";
WHEN "0001110001" => OUTP <= "010100010";
WHEN "0001110010" => OUTP <= "010100011";
WHEN "0001110011" => OUTP <= "010100100";
WHEN "0001110100" => OUTP <= "010100101";
WHEN "0001110101" => OUTP <= "010100111";
WHEN "0001110110" => OUTP <= "010101000";
WHEN "0001110111" => OUTP <= "010101001";
WHEN "0001111000" => OUTP <= "010101010";
WHEN "0001111001" => OUTP <= "010101011";
WHEN "0001111010" => OUTP <= "010101100";
WHEN "0001111011" => OUTP <= "010101110";
WHEN "0001111100" => OUTP <= "010101111";
WHEN "0001111101" => OUTP <= "010110000";
WHEN "0001111110" => OUTP <= "010110001";
WHEN "0001111111" => OUTP <= "010110010";
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