📄 multi8x8.tan.qmsg
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{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "clk register SREG8B:inst1\|reg8\[0\] register REG16B:inst3\|r16s\[13\] 240.33 MHz 4.161 ns Internal " "Info: Clock \"clk\" has Internal fmax of 240.33 MHz between source register \"SREG8B:inst1\|reg8\[0\]\" and destination register \"REG16B:inst3\|r16s\[13\]\" (period= 4.161 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "2.863 ns + Longest register register " "Info: + Longest register to register delay is 2.863 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns SREG8B:inst1\|reg8\[0\] 1 REG LC_X21_Y13_N1 8 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X21_Y13_N1; Fanout = 8; REG Node = 'SREG8B:inst1\|reg8\[0\]'" { } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "" { SREG8B:inst1|reg8[0] } "NODE_NAME" } "" } } { "SREG8B.vhd" "" { Text "E:/study/multi8x8/SREG8B.vhd" 51 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.905 ns) + CELL(0.225 ns) 1.130 ns ANDARITH:inst4\|dout\[0\] 2 COMB LC_X20_Y13_N9 3 " "Info: 2: + IC(0.905 ns) + CELL(0.225 ns) = 1.130 ns; Loc. = LC_X20_Y13_N9; Fanout = 3; COMB Node = 'ANDARITH:inst4\|dout\[0\]'" { } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "1.130 ns" { SREG8B:inst1|reg8[0] ANDARITH:inst4|dout[0] } "NODE_NAME" } "" } } { "ANDARITH.vhd" "" { Text "E:/study/multi8x8/ANDARITH.vhd" 35 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.336 ns) + CELL(0.434 ns) 1.900 ns REG16B:inst3\|r16s\[7\]~110 3 COMB LC_X20_Y13_N0 2 " "Info: 3: + IC(0.336 ns) + CELL(0.434 ns) = 1.900 ns; Loc. = LC_X20_Y13_N0; Fanout = 2; COMB Node = 'REG16B:inst3\|r16s\[7\]~110'" { } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "0.770 ns" { ANDARITH:inst4|dout[0] REG16B:inst3|r16s[7]~110 } "NODE_NAME" } "" } } { "REG16B.vhd" "" { Text "E:/study/multi8x8/REG16B.vhd" 51 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.060 ns) 1.960 ns REG16B:inst3\|r16s\[8\]~106 4 COMB LC_X20_Y13_N1 2 " "Info: 4: + IC(0.000 ns) + CELL(0.060 ns) = 1.960 ns; Loc. = LC_X20_Y13_N1; Fanout = 2; COMB Node = 'REG16B:inst3\|r16s\[8\]~106'" { } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "0.060 ns" { REG16B:inst3|r16s[7]~110 REG16B:inst3|r16s[8]~106 } "NODE_NAME" } "" } } { "REG16B.vhd" "" { Text "E:/study/multi8x8/REG16B.vhd" 51 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.060 ns) 2.020 ns REG16B:inst3\|r16s\[9\]~102 5 COMB LC_X20_Y13_N2 2 " "Info: 5: + IC(0.000 ns) + CELL(0.060 ns) = 2.020 ns; Loc. = LC_X20_Y13_N2; Fanout = 2; COMB Node = 'REG16B:inst3\|r16s\[9\]~102'" { } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "0.060 ns" { REG16B:inst3|r16s[8]~106 REG16B:inst3|r16s[9]~102 } "NODE_NAME" } "" } } { "REG16B.vhd" "" { Text "E:/study/multi8x8/REG16B.vhd" 51 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.060 ns) 2.080 ns REG16B:inst3\|r16s\[10\]~98 6 COMB LC_X20_Y13_N3 2 " "Info: 6: + IC(0.000 ns) + CELL(0.060 ns) = 2.080 ns; Loc. = LC_X20_Y13_N3; Fanout = 2; COMB Node = 'REG16B:inst3\|r16s\[10\]~98'" { } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "0.060 ns" { REG16B:inst3|r16s[9]~102 REG16B:inst3|r16s[10]~98 } "NODE_NAME" } "" } } { "REG16B.vhd" "" { Text "E:/study/multi8x8/REG16B.vhd" 51 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.137 ns) 2.217 ns REG16B:inst3\|r16s\[11\]~94 7 COMB LC_X20_Y13_N4 4 " "Info: 7: + IC(0.000 ns) + CELL(0.137 ns) = 2.217 ns; Loc. = LC_X20_Y13_N4; Fanout = 4; COMB Node = 'REG16B:inst3\|r16s\[11\]~94'" { } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "0.137 ns" { REG16B:inst3|r16s[10]~98 REG16B:inst3|r16s[11]~94 } "NODE_NAME" } "" } } { "REG16B.vhd" "" { Text "E:/study/multi8x8/REG16B.vhd" 51 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.646 ns) 2.863 ns REG16B:inst3\|r16s\[13\] 8 REG LC_X20_Y13_N6 4 " "Info: 8: + IC(0.000 ns) + CELL(0.646 ns) = 2.863 ns; Loc. = LC_X20_Y13_N6; Fanout = 4; REG Node = 'REG16B:inst3\|r16s\[13\]'" { } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "0.646 ns" { REG16B:inst3|r16s[11]~94 REG16B:inst3|r16s[13] } "NODE_NAME" } "" } } { "REG16B.vhd" "" { Text "E:/study/multi8x8/REG16B.vhd" 51 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.622 ns ( 56.65 % ) " "Info: Total cell delay = 1.622 ns ( 56.65 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.241 ns ( 43.35 % ) " "Info: Total interconnect delay = 1.241 ns ( 43.35 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "2.863 ns" { SREG8B:inst1|reg8[0] ANDARITH:inst4|dout[0] REG16B:inst3|r16s[7]~110 REG16B:inst3|r16s[8]~106 REG16B:inst3|r16s[9]~102 REG16B:inst3|r16s[10]~98 REG16B:inst3|r16s[11]~94 REG16B:inst3|r16s[13] } "NODE_NAME" } "" } } { "d:/altera/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/bin/Technology_Viewer.qrui" "2.863 ns" { SREG8B:inst1|reg8[0] ANDARITH:inst4|dout[0] REG16B:inst3|r16s[7]~110 REG16B:inst3|r16s[8]~106 REG16B:inst3|r16s[9]~102 REG16B:inst3|r16s[10]~98 REG16B:inst3|r16s[11]~94 REG16B:inst3|r16s[13] } { 0.000ns 0.905ns 0.336ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns } { 0.000ns 0.225ns 0.434ns 0.060ns 0.060ns 0.060ns 0.137ns 0.646ns } } } } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-1.096 ns - Smallest " "Info: - Smallest clock skew is -1.096 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 5.575 ns + Shortest register " "Info: + Shortest clock path from clock \"clk\" to destination register is 5.575 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.130 ns) 1.130 ns clk 1 CLK PIN_10 5 " "Info: 1: + IC(0.000 ns) + CELL(1.130 ns) = 1.130 ns; Loc. = PIN_10; Fanout = 5; CLK Node = 'clk'" { } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "" { clk } "NODE_NAME" } "" } } { "multi8x8.bdf" "" { Schematic "E:/study/multi8x8/multi8x8.bdf" { { 48 24 192 64 "clk" "" } { 40 192 240 56 "clk" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.763 ns) + CELL(0.088 ns) 1.981 ns ARICTL:inst\|clkout~24 2 COMB LC_X7_Y9_N7 23 " "Info: 2: + IC(0.763 ns) + CELL(0.088 ns) = 1.981 ns; Loc. = LC_X7_Y9_N7; Fanout = 23; COMB Node = 'ARICTL:inst\|clkout~24'" { } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "0.851 ns" { clk ARICTL:inst|clkout~24 } "NODE_NAME" } "" } } { "ARICTL.vhd" "" { Text "E:/study/multi8x8/ARICTL.vhd" 36 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.047 ns) + CELL(0.547 ns) 5.575 ns REG16B:inst3\|r16s\[13\] 3 REG LC_X20_Y13_N6 4 " "Info: 3: + IC(3.047 ns) + CELL(0.547 ns) = 5.575 ns; Loc. = LC_X20_Y13_N6; Fanout = 4; REG Node = 'REG16B:inst3\|r16s\[13\]'" { } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "3.594 ns" { ARICTL:inst|clkout~24 REG16B:inst3|r16s[13] } "NODE_NAME" } "" } } { "REG16B.vhd" "" { Text "E:/study/multi8x8/REG16B.vhd" 51 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.765 ns ( 31.66 % ) " "Info: Total cell delay = 1.765 ns ( 31.66 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.810 ns ( 68.34 % ) " "Info: Total interconnect delay = 3.810 ns ( 68.34 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "5.575 ns" { clk ARICTL:inst|clkout~24 REG16B:inst3|r16s[13] } "NODE_NAME" } "" } } { "d:/altera/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/bin/Technology_Viewer.qrui" "5.575 ns" { clk clk~out0 ARICTL:inst|clkout~24 REG16B:inst3|r16s[13] } { 0.000ns 0.000ns 0.763ns 3.047ns } { 0.000ns 1.130ns 0.088ns 0.547ns } } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 6.671 ns - Longest register " "Info: - Longest clock path from clock \"clk\" to source register is 6.671 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.130 ns) 1.130 ns clk 1 CLK PIN_10 5 " "Info: 1: + IC(0.000 ns) + CELL(1.130 ns) = 1.130 ns; Loc. = PIN_10; Fanout = 5; CLK Node = 'clk'" { } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "" { clk } "NODE_NAME" } "" } } { "multi8x8.bdf" "" { Schematic "E:/study/multi8x8/multi8x8.bdf" { { 48 24 192 64 "clk" "" } { 40 192 240 56 "clk" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.451 ns) + CELL(0.720 ns) 2.301 ns ARICTL:inst\|cnt4b\[3\] 2 REG LC_X7_Y9_N5 6 " "Info: 2: + IC(0.451 ns) + CELL(0.720 ns) = 2.301 ns; Loc. = LC_X7_Y9_N5; Fanout = 6; REG Node = 'ARICTL:inst\|cnt4b\[3\]'" { } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "1.171 ns" { clk ARICTL:inst|cnt4b[3] } "NODE_NAME" } "" } } { "ARICTL.vhd" "" { Text "E:/study/multi8x8/ARICTL.vhd" 54 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.436 ns) + CELL(0.340 ns) 3.077 ns ARICTL:inst\|clkout~24 3 COMB LC_X7_Y9_N7 23 " "Info: 3: + IC(0.436 ns) + CELL(0.340 ns) = 3.077 ns; Loc. = LC_X7_Y9_N7; Fanout = 23; COMB Node = 'ARICTL:inst\|clkout~24'" { } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "0.776 ns" { ARICTL:inst|cnt4b[3] ARICTL:inst|clkout~24 } "NODE_NAME" } "" } } { "ARICTL.vhd" "" { Text "E:/study/multi8x8/ARICTL.vhd" 36 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.047 ns) + CELL(0.547 ns) 6.671 ns SREG8B:inst1\|reg8\[0\] 4 REG LC_X21_Y13_N1 8 " "Info: 4: + IC(3.047 ns) + CELL(0.547 ns) = 6.671 ns; Loc. = LC_X21_Y13_N1; Fanout = 8; REG Node = 'SREG8B:inst1\|reg8\[0\]'" { } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "3.594 ns" { ARICTL:inst|clkout~24 SREG8B:inst1|reg8[0] } "NODE_NAME" } "" } } { "SREG8B.vhd" "" { Text "E:/study/multi8x8/SREG8B.vhd" 51 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.737 ns ( 41.03 % ) " "Info: Total cell delay = 2.737 ns ( 41.03 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.934 ns ( 58.97 % ) " "Info: Total interconnect delay = 3.934 ns ( 58.97 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "6.671 ns" { clk ARICTL:inst|cnt4b[3] ARICTL:inst|clkout~24 SREG8B:inst1|reg8[0] } "NODE_NAME" } "" } } { "d:/altera/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/bin/Technology_Viewer.qrui" "6.671 ns" { clk clk~out0 ARICTL:inst|cnt4b[3] ARICTL:inst|clkout~24 SREG8B:inst1|reg8[0] } { 0.000ns 0.000ns 0.451ns 0.436ns 3.047ns } { 0.000ns 1.130ns 0.720ns 0.340ns 0.547ns } } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "5.575 ns" { clk ARICTL:inst|clkout~24 REG16B:inst3|r16s[13] } "NODE_NAME" } "" } } { "d:/altera/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/bin/Technology_Viewer.qrui" "5.575 ns" { clk clk~out0 ARICTL:inst|clkout~24 REG16B:inst3|r16s[13] } { 0.000ns 0.000ns 0.763ns 3.047ns } { 0.000ns 1.130ns 0.088ns 0.547ns } } } { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "6.671 ns" { clk ARICTL:inst|cnt4b[3] ARICTL:inst|clkout~24 SREG8B:inst1|reg8[0] } "NODE_NAME" } "" } } { "d:/altera/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/bin/Technology_Viewer.qrui" "6.671 ns" { clk clk~out0 ARICTL:inst|cnt4b[3] ARICTL:inst|clkout~24 SREG8B:inst1|reg8[0] } { 0.000ns 0.000ns 0.451ns 0.436ns 3.047ns } { 0.000ns 1.130ns 0.720ns 0.340ns 0.547ns } } } } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.173 ns + " "Info: + Micro clock to output delay of source is 0.173 ns" { } { { "SREG8B.vhd" "" { Text "E:/study/multi8x8/SREG8B.vhd" 51 -1 0 } } } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.029 ns + " "Info: + Micro setup delay of destination is 0.029 ns" { } { { "REG16B.vhd" "" { Text "E:/study/multi8x8/REG16B.vhd" 51 -1 0 } } } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0} } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "2.863 ns" { SREG8B:inst1|reg8[0] ANDARITH:inst4|dout[0] REG16B:inst3|r16s[7]~110 REG16B:inst3|r16s[8]~106 REG16B:inst3|r16s[9]~102 REG16B:inst3|r16s[10]~98 REG16B:inst3|r16s[11]~94 REG16B:inst3|r16s[13] } "NODE_NAME" } "" } } { "d:/altera/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/bin/Technology_Viewer.qrui" "2.863 ns" { SREG8B:inst1|reg8[0] ANDARITH:inst4|dout[0] REG16B:inst3|r16s[7]~110 REG16B:inst3|r16s[8]~106 REG16B:inst3|r16s[9]~102 REG16B:inst3|r16s[10]~98 REG16B:inst3|r16s[11]~94 REG16B:inst3|r16s[13] } { 0.000ns 0.905ns 0.336ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns } { 0.000ns 0.225ns 0.434ns 0.060ns 0.060ns 0.060ns 0.137ns 0.646ns } } } { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "5.575 ns" { clk ARICTL:inst|clkout~24 REG16B:inst3|r16s[13] } "NODE_NAME" } "" } } { "d:/altera/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/bin/Technology_Viewer.qrui" "5.575 ns" { clk clk~out0 ARICTL:inst|clkout~24 REG16B:inst3|r16s[13] } { 0.000ns 0.000ns 0.763ns 3.047ns } { 0.000ns 1.130ns 0.088ns 0.547ns } } } { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "6.671 ns" { clk ARICTL:inst|cnt4b[3] ARICTL:inst|clkout~24 SREG8B:inst1|reg8[0] } "NODE_NAME" } "" } } { "d:/altera/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/bin/Technology_Viewer.qrui" "6.671 ns" { clk clk~out0 ARICTL:inst|cnt4b[3] ARICTL:inst|clkout~24 SREG8B:inst1|reg8[0] } { 0.000ns 0.000ns 0.451ns 0.436ns 3.047ns } { 0.000ns 1.130ns 0.720ns 0.340ns 0.547ns } } } } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "start register SREG8B:inst1\|reg8\[0\] register REG16B:inst3\|r16s\[13\] 326.26 MHz 3.065 ns Internal " "Info: Clock \"start\" has Internal fmax of 326.26 MHz between source register \"SREG8B:inst1\|reg8\[0\]\" and destination register \"REG16B:inst3\|r16s\[13\]\" (period= 3.065 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "2.863 ns + Longest register register " "Info: + Longest register to register delay is 2.863 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns SREG8B:inst1\|reg8\[0\] 1 REG LC_X21_Y13_N1 8 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X21_Y13_N1; Fanout = 8; REG Node = 'SREG8B:inst1\|reg8\[0\]'" { } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "" { SREG8B:inst1|reg8[0] } "NODE_NAME" } "" } } { "SREG8B.vhd" "" { Text "E:/study/multi8x8/SREG8B.vhd" 51 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.905 ns) + CELL(0.225 ns) 1.130 ns ANDARITH:inst4\|dout\[0\] 2 COMB LC_X20_Y13_N9 3 " "Info: 2: + IC(0.905 ns) + CELL(0.225 ns) = 1.130 ns; Loc. = LC_X20_Y13_N9; Fanout = 3; COMB Node = 'ANDARITH:inst4\|dout\[0\]'" { } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "1.130 ns" { SREG8B:inst1|reg8[0] ANDARITH:inst4|dout[0] } "NODE_NAME" } "" } } { "ANDARITH.vhd" "" { Text "E:/study/multi8x8/ANDARITH.vhd" 35 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.336 ns) + CELL(0.434 ns) 1.900 ns REG16B:inst3\|r16s\[7\]~110 3 COMB LC_X20_Y13_N0 2 " "Info: 3: + IC(0.336 ns) + CELL(0.434 ns) = 1.900 ns; Loc. = LC_X20_Y13_N0; Fanout = 2; COMB Node = 'REG16B:inst3\|r16s\[7\]~110'" { } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "0.770 ns" { ANDARITH:inst4|dout[0] REG16B:inst3|r16s[7]~110 } "NODE_NAME" } "" } } { "REG16B.vhd" "" { Text "E:/study/multi8x8/REG16B.vhd" 51 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.060 ns) 1.960 ns REG16B:inst3\|r16s\[8\]~106 4 COMB LC_X20_Y13_N1 2 " "Info: 4: + IC(0.000 ns) + CELL(0.060 ns) = 1.960 ns; Loc. = LC_X20_Y13_N1; Fanout = 2; COMB Node = 'REG16B:inst3\|r16s\[8\]~106'" { } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "0.060 ns" { REG16B:inst3|r16s[7]~110 REG16B:inst3|r16s[8]~106 } "NODE_NAME" } "" } } { "REG16B.vhd" "" { Text "E:/study/multi8x8/REG16B.vhd" 51 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.060 ns) 2.020 ns REG16B:inst3\|r16s\[9\]~102 5 COMB LC_X20_Y13_N2 2 " "Info: 5: + IC(0.000 ns) + CELL(0.060 ns) = 2.020 ns; Loc. = LC_X20_Y13_N2; Fanout = 2; COMB Node = 'REG16B:inst3\|r16s\[9\]~102'" { } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "0.060 ns" { REG16B:inst3|r16s[8]~106 REG16B:inst3|r16s[9]~102 } "NODE_NAME" } "" } } { "REG16B.vhd" "" { Text "E:/study/multi8x8/REG16B.vhd" 51 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.060 ns) 2.080 ns REG16B:inst3\|r16s\[10\]~98 6 COMB LC_X20_Y13_N3 2 " "Info: 6: + IC(0.000 ns) + CELL(0.060 ns) = 2.080 ns; Loc. = LC_X20_Y13_N3; Fanout = 2; COMB Node = 'REG16B:inst3\|r16s\[10\]~98'" { } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "0.060 ns" { REG16B:inst3|r16s[9]~102 REG16B:inst3|r16s[10]~98 } "NODE_NAME" } "" } } { "REG16B.vhd" "" { Text "E:/study/multi8x8/REG16B.vhd" 51 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.137 ns) 2.217 ns REG16B:inst3\|r16s\[11\]~94 7 COMB LC_X20_Y13_N4 4 " "Info: 7: + IC(0.000 ns) + CELL(0.137 ns) = 2.217 ns; Loc. = LC_X20_Y13_N4; Fanout = 4; COMB Node = 'REG16B:inst3\|r16s\[11\]~94'" { } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "0.137 ns" { REG16B:inst3|r16s[10]~98 REG16B:inst3|r16s[11]~94 } "NODE_NAME" } "" } } { "REG16B.vhd" "" { Text "E:/study/multi8x8/REG16B.vhd" 51 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.646 ns) 2.863 ns REG16B:inst3\|r16s\[13\] 8 REG LC_X20_Y13_N6 4 " "Info: 8: + IC(0.000 ns) + CELL(0.646 ns) = 2.863 ns; Loc. = LC_X20_Y13_N6; Fanout = 4; REG Node = 'REG16B:inst3\|r16s\[13\]'" { } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "0.646 ns" { REG16B:inst3|r16s[11]~94 REG16B:inst3|r16s[13] } "NODE_NAME" } "" } } { "REG16B.vhd" "" { Text "E:/study/multi8x8/REG16B.vhd" 51 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.622 ns ( 56.65 % ) " "Info: Total cell delay = 1.622 ns ( 56.65 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.241 ns ( 43.35 % ) " "Info: Total interconnect delay = 1.241 ns ( 43.35 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "2.863 ns" { SREG8B:inst1|reg8[0] ANDARITH:inst4|dout[0] REG16B:inst3|r16s[7]~110 REG16B:inst3|r16s[8]~106 REG16B:inst3|r16s[9]~102 REG16B:inst3|r16s[10]~98 REG16B:inst3|r16s[11]~94 REG16B:inst3|r16s[13] } "NODE_NAME" } "" } } { "d:/altera/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/bin/Technology_Viewer.qrui" "2.863 ns" { SREG8B:inst1|reg8[0] ANDARITH:inst4|dout[0] REG16B:inst3|r16s[7]~110 REG16B:inst3|r16s[8]~106 REG16B:inst3|r16s[9]~102 REG16B:inst3|r16s[10]~98 REG16B:inst3|r16s[11]~94 REG16B:inst3|r16s[13] } { 0.000ns 0.905ns 0.336ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns } { 0.000ns 0.225ns 0.434ns 0.060ns 0.060ns 0.060ns 0.137ns 0.646ns } } } } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "start destination 5.842 ns + Shortest register " "Info: + Shortest clock path from clock \"start\" to destination register is 5.842 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.130 ns) 1.130 ns start 1 CLK PIN_66 30 " "Info: 1: + IC(0.000 ns) + CELL(1.130 ns) = 1.130 ns; Loc. = PIN_66; Fanout = 30; CLK Node = 'start'" { } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "" { start } "NODE_NAME" } "" } } { "multi8x8.bdf" "" { Schematic "E:/study/multi8x8/multi8x8.bdf" { { 88 24 192 104 "start" "" } { 80 192 240 96 "start" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.893 ns) + CELL(0.225 ns) 2.248 ns ARICTL:inst\|clkout~24 2 COMB LC_X7_Y9_N7 23 " "Info: 2: + IC(0.893 ns) + CELL(0.225 ns) = 2.248 ns; Loc. = LC_X7_Y9_N7; Fanout = 23; COMB Node = 'ARICTL:inst\|clkout~24'" { } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "1.118 ns" { start ARICTL:inst|clkout~24 } "NODE_NAME" } "" } } { "ARICTL.vhd" "" { Text "E:/study/multi8x8/ARICTL.vhd" 36 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.047 ns) + CELL(0.547 ns) 5.842 ns REG16B:inst3\|r16s\[13\] 3 REG LC_X20_Y13_N6 4 " "Info: 3: + IC(3.047 ns) + CELL(0.547 ns) = 5.842 ns; Loc. = LC_X20_Y13_N6; Fanout = 4; REG Node = 'REG16B:inst3\|r16s\[13\]'" { } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "3.594 ns" { ARICTL:inst|clkout~24 REG16B:inst3|r16s[13] } "NODE_NAME" } "" } } { "REG16B.vhd" "" { Text "E:/study/multi8x8/REG16B.vhd" 51 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.902 ns ( 32.56 % ) " "Info: Total cell delay = 1.902 ns ( 32.56 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.940 ns ( 67.44 % ) " "Info: Total interconnect delay = 3.940 ns ( 67.44 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "5.842 ns" { start ARICTL:inst|clkout~24 REG16B:inst3|r16s[13] } "NODE_NAME" } "" } } { "d:/altera/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/bin/Technology_Viewer.qrui" "5.842 ns" { start start~out0 ARICTL:inst|clkout~24 REG16B:inst3|r16s[13] } { 0.000ns 0.000ns 0.893ns 3.047ns } { 0.000ns 1.130ns 0.225ns 0.547ns } } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "start source 5.842 ns - Longest register " "Info: - Longest clock path from clock \"start\" to source register is 5.842 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.130 ns) 1.130 ns start 1 CLK PIN_66 30 " "Info: 1: + IC(0.000 ns) + CELL(1.130 ns) = 1.130 ns; Loc. = PIN_66; Fanout = 30; CLK Node = 'start'" { } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "" { start } "NODE_NAME" } "" } } { "multi8x8.bdf" "" { Schematic "E:/study/multi8x8/multi8x8.bdf" { { 88 24 192 104 "start" "" } { 80 192 240 96 "start" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.893 ns) + CELL(0.225 ns) 2.248 ns ARICTL:inst\|clkout~24 2 COMB LC_X7_Y9_N7 23 " "Info: 2: + IC(0.893 ns) + CELL(0.225 ns) = 2.248 ns; Loc. = LC_X7_Y9_N7; Fanout = 23; COMB Node = 'ARICTL:inst\|clkout~24'" { } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "1.118 ns" { start ARICTL:inst|clkout~24 } "NODE_NAME" } "" } } { "ARICTL.vhd" "" { Text "E:/study/multi8x8/ARICTL.vhd" 36 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.047 ns) + CELL(0.547 ns) 5.842 ns SREG8B:inst1\|reg8\[0\] 3 REG LC_X21_Y13_N1 8 " "Info: 3: + IC(3.047 ns) + CELL(0.547 ns) = 5.842 ns; Loc. = LC_X21_Y13_N1; Fanout = 8; REG Node = 'SREG8B:inst1\|reg8\[0\]'" { } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "3.594 ns" { ARICTL:inst|clkout~24 SREG8B:inst1|reg8[0] } "NODE_NAME" } "" } } { "SREG8B.vhd" "" { Text "E:/study/multi8x8/SREG8B.vhd" 51 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.902 ns ( 32.56 % ) " "Info: Total cell delay = 1.902 ns ( 32.56 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.940 ns ( 67.44 % ) " "Info: Total interconnect delay = 3.940 ns ( 67.44 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "5.842 ns" { start ARICTL:inst|clkout~24 SREG8B:inst1|reg8[0] } "NODE_NAME" } "" } } { "d:/altera/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/bin/Technology_Viewer.qrui" "5.842 ns" { start start~out0 ARICTL:inst|clkout~24 SREG8B:inst1|reg8[0] } { 0.000ns 0.000ns 0.893ns 3.047ns } { 0.000ns 1.130ns 0.225ns 0.547ns } } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "5.842 ns" { start ARICTL:inst|clkout~24 REG16B:inst3|r16s[13] } "NODE_NAME" } "" } } { "d:/altera/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/bin/Technology_Viewer.qrui" "5.842 ns" { start start~out0 ARICTL:inst|clkout~24 REG16B:inst3|r16s[13] } { 0.000ns 0.000ns 0.893ns 3.047ns } { 0.000ns 1.130ns 0.225ns 0.547ns } } } { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "5.842 ns" { start ARICTL:inst|clkout~24 SREG8B:inst1|reg8[0] } "NODE_NAME" } "" } } { "d:/altera/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/bin/Technology_Viewer.qrui" "5.842 ns" { start start~out0 ARICTL:inst|clkout~24 SREG8B:inst1|reg8[0] } { 0.000ns 0.000ns 0.893ns 3.047ns } { 0.000ns 1.130ns 0.225ns 0.547ns } } } } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.173 ns + " "Info: + Micro clock to output delay of source is 0.173 ns" { } { { "SREG8B.vhd" "" { Text "E:/study/multi8x8/SREG8B.vhd" 51 -1 0 } } } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.029 ns + " "Info: + Micro setup delay of destination is 0.029 ns" { } { { "REG16B.vhd" "" { Text "E:/study/multi8x8/REG16B.vhd" 51 -1 0 } } } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0} } { { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "2.863 ns" { SREG8B:inst1|reg8[0] ANDARITH:inst4|dout[0] REG16B:inst3|r16s[7]~110 REG16B:inst3|r16s[8]~106 REG16B:inst3|r16s[9]~102 REG16B:inst3|r16s[10]~98 REG16B:inst3|r16s[11]~94 REG16B:inst3|r16s[13] } "NODE_NAME" } "" } } { "d:/altera/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/bin/Technology_Viewer.qrui" "2.863 ns" { SREG8B:inst1|reg8[0] ANDARITH:inst4|dout[0] REG16B:inst3|r16s[7]~110 REG16B:inst3|r16s[8]~106 REG16B:inst3|r16s[9]~102 REG16B:inst3|r16s[10]~98 REG16B:inst3|r16s[11]~94 REG16B:inst3|r16s[13] } { 0.000ns 0.905ns 0.336ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns } { 0.000ns 0.225ns 0.434ns 0.060ns 0.060ns 0.060ns 0.137ns 0.646ns } } } { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "5.842 ns" { start ARICTL:inst|clkout~24 REG16B:inst3|r16s[13] } "NODE_NAME" } "" } } { "d:/altera/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/bin/Technology_Viewer.qrui" "5.842 ns" { start start~out0 ARICTL:inst|clkout~24 REG16B:inst3|r16s[13] } { 0.000ns 0.000ns 0.893ns 3.047ns } { 0.000ns 1.130ns 0.225ns 0.547ns } } } { "d:/altera/bin/Report_Window_01.qrpt" "" { Report "d:/altera/bin/Report_Window_01.qrpt" "Compiler" "multi8x8" "UNKNOWN" "V1" "E:/study/multi8x8/db/multi8x8.quartus_db" { Floorplan "E:/study/multi8x8/" "" "5.842 ns" { start ARICTL:inst|clkout~24 SREG8B:inst1|reg8[0] } "NODE_NAME" } "" } } { "d:/altera/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/bin/Technology_Viewer.qrui" "5.842 ns" { start start~out0 ARICTL:inst|clkout~24 SREG8B:inst1|reg8[0] } { 0.000ns 0.000ns 0.893ns 3.047ns } { 0.000ns 1.130ns 0.225ns 0.547ns } } } } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0}
{ "Warning" "WTAN_CLOCK_WILL_NOT_OPERATE" "clk 15 " "Warning: Circuit may not operate. Detected 15 non-operational path(s) clocked by clock \"clk\" with clock skew larger than data delay. See Compilation Report for details." { } { } 0 0 "Circuit may not operate. Detected %2!d! non-operational path(s) clocked by clock \"%1!s!\" with clock skew larger than data delay. See Compilation Report for details." 0 0}
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