⭐ 欢迎来到虫虫下载站! | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站

📄 multi8x8.tan.rpt

📁 VHDL实现的8位乘法器
💻 RPT
📖 第 1 页 / 共 5 页
字号:
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[9]  ; REG16B:inst3|r16s[13] ; start      ; start    ; None                        ; None                      ; 1.747 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[9]  ; REG16B:inst3|r16s[12] ; start      ; start    ; None                        ; None                      ; 1.747 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[9]  ; REG16B:inst3|r16s[14] ; start      ; start    ; None                        ; None                      ; 1.747 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[9]  ; REG16B:inst3|r16s[15] ; start      ; start    ; None                        ; None                      ; 1.747 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[8]  ; REG16B:inst3|r16s[11] ; start      ; start    ; None                        ; None                      ; 1.685 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[8]  ; REG16B:inst3|r16s[10] ; start      ; start    ; None                        ; None                      ; 1.623 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[9]  ; REG16B:inst3|r16s[11] ; start      ; start    ; None                        ; None                      ; 1.583 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[13] ; REG16B:inst3|r16s[15] ; start      ; start    ; None                        ; None                      ; 1.580 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[8]  ; REG16B:inst3|r16s[9]  ; start      ; start    ; None                        ; None                      ; 1.561 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[10] ; REG16B:inst3|r16s[13] ; start      ; start    ; None                        ; None                      ; 1.557 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[10] ; REG16B:inst3|r16s[12] ; start      ; start    ; None                        ; None                      ; 1.557 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[10] ; REG16B:inst3|r16s[14] ; start      ; start    ; None                        ; None                      ; 1.557 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[10] ; REG16B:inst3|r16s[15] ; start      ; start    ; None                        ; None                      ; 1.557 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[9]  ; REG16B:inst3|r16s[10] ; start      ; start    ; None                        ; None                      ; 1.521 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[14] ; REG16B:inst3|r16s[15] ; start      ; start    ; None                        ; None                      ; 1.520 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[13] ; REG16B:inst3|r16s[14] ; start      ; start    ; None                        ; None                      ; 1.518 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[11] ; REG16B:inst3|r16s[13] ; start      ; start    ; None                        ; None                      ; 1.504 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[11] ; REG16B:inst3|r16s[12] ; start      ; start    ; None                        ; None                      ; 1.504 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[11] ; REG16B:inst3|r16s[14] ; start      ; start    ; None                        ; None                      ; 1.504 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[11] ; REG16B:inst3|r16s[15] ; start      ; start    ; None                        ; None                      ; 1.504 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[8]  ; REG16B:inst3|r16s[8]  ; start      ; start    ; None                        ; None                      ; 1.499 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[12] ; REG16B:inst3|r16s[13] ; start      ; start    ; None                        ; None                      ; 1.485 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[12] ; REG16B:inst3|r16s[12] ; start      ; start    ; None                        ; None                      ; 1.485 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[12] ; REG16B:inst3|r16s[14] ; start      ; start    ; None                        ; None                      ; 1.485 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[12] ; REG16B:inst3|r16s[15] ; start      ; start    ; None                        ; None                      ; 1.485 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[9]  ; REG16B:inst3|r16s[9]  ; start      ; start    ; None                        ; None                      ; 1.459 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[14] ; REG16B:inst3|r16s[14] ; start      ; start    ; None                        ; None                      ; 1.458 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[13] ; REG16B:inst3|r16s[13] ; start      ; start    ; None                        ; None                      ; 1.456 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[10] ; REG16B:inst3|r16s[11] ; start      ; start    ; None                        ; None                      ; 1.389 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[11] ; REG16B:inst3|r16s[11] ; start      ; start    ; None                        ; None                      ; 1.334 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[15] ; REG16B:inst3|r16s[15] ; start      ; start    ; None                        ; None                      ; 1.333 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[10] ; REG16B:inst3|r16s[10] ; start      ; start    ; None                        ; None                      ; 1.327 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[8]  ; REG16B:inst3|r16s[7]  ; start      ; start    ; None                        ; None                      ; 1.027 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[9]  ; REG16B:inst3|r16s[8]  ; start      ; start    ; None                        ; None                      ; 0.978 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[14] ; REG16B:inst3|r16s[13] ; start      ; start    ; None                        ; None                      ; 0.977 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[13] ; REG16B:inst3|r16s[12] ; start      ; start    ; None                        ; None                      ; 0.975 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[11] ; REG16B:inst3|r16s[10] ; start      ; start    ; None                        ; None                      ; 0.862 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[15] ; REG16B:inst3|r16s[14] ; start      ; start    ; None                        ; None                      ; 0.861 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[12] ; REG16B:inst3|r16s[11] ; start      ; start    ; None                        ; None                      ; 0.857 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; SREG8B:inst1|reg8[5]  ; SREG8B:inst1|reg8[4]  ; start      ; start    ; None                        ; None                      ; 0.856 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[10] ; REG16B:inst3|r16s[9]  ; start      ; start    ; None                        ; None                      ; 0.855 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; SREG8B:inst1|reg8[1]  ; SREG8B:inst1|reg8[0]  ; start      ; start    ; None                        ; None                      ; 0.668 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; SREG8B:inst1|reg8[4]  ; SREG8B:inst1|reg8[3]  ; start      ; start    ; None                        ; None                      ; 0.636 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; SREG8B:inst1|reg8[6]  ; SREG8B:inst1|reg8[5]  ; start      ; start    ; None                        ; None                      ; 0.635 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; SREG8B:inst1|reg8[2]  ; SREG8B:inst1|reg8[1]  ; start      ; start    ; None                        ; None                      ; 0.634 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[6]  ; REG16B:inst3|r16s[5]  ; start      ; start    ; None                        ; None                      ; 0.633 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[4]  ; REG16B:inst3|r16s[3]  ; start      ; start    ; None                        ; None                      ; 0.511 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[5]  ; REG16B:inst3|r16s[4]  ; start      ; start    ; None                        ; None                      ; 0.510 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[1]  ; REG16B:inst3|r16s[0]  ; start      ; start    ; None                        ; None                      ; 0.509 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[2]  ; REG16B:inst3|r16s[1]  ; start      ; start    ; None                        ; None                      ; 0.506 ns                ;
; N/A   ; Restricted to 405.19 MHz ( period = 2.468 ns ) ; REG16B:inst3|r16s[3]  ; REG16B:inst3|r16s[2]  ; start      ; start    ; None                        ; None                      ; 0.506 ns                ;
+-------+------------------------------------------------+-----------------------+-----------------------+------------+----------+-----------------------------+---------------------------+-------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Hold: 'clk'                                                                                                                                                                                     ;
+------------------------------------------+-----------------------+-----------------------+------------+----------+----------------------------+----------------------------+--------------------------+
; Minimum Slack                            ; From                  ; To                    ; From Clock ; To Clock ; Required Hold Relationship ; Required Shortest P2P Time ; Actual Shortest P2P Time ;
+------------------------------------------+-----------------------+-----------------------+------------+----------+----------------------------+----------------------------+--------------------------+
; Not operational: Clock Skew > Data Delay ; REG16B:inst3|r16s[2]  ; REG16B:inst3|r16s[1]  ; clk        ; clk      ; None                       ; None                       ; 0.506 ns                 ;
; Not operational: Clock Skew > Data Delay ; REG16B:inst3|r16s[3]  ; REG16B:inst3|r16s[2]  ; clk        ; clk      ; None                       ; None                       ; 0.506 ns                 ;
; Not operational: Clock Skew > Data Delay ; REG16B:inst3|r16s[1]  ; REG16B:inst3|r16s[0]  ; clk        ; clk      ; None                       ; None                       ; 0.509 ns                 ;
; Not operational: Clock Skew > Data Delay ; REG16B:inst3|r16s[5]  ; REG16B:inst3|r16s[4]  ; clk        ; clk      ; None                       ; None                       ; 0.510 ns                 ;
; Not operational: Clock Skew > Data Delay ; REG16B:inst3|r16s[4]  ; REG16B:inst3|r16s[3]  ; clk        ; clk      ; None                       ; None                       ; 0.511 ns                 ;
; Not operational: Clock Skew > Data Delay ; REG16B:inst3|r16s[6]  ; REG16B:inst3|r16s[5]  ; clk        ; clk      ; None                       ; None                       ; 0.633 ns                 ;
; Not operational: Clock Skew > Data Delay ; SREG8B:inst1|reg8[2]  ; SREG8B:inst1|reg8[1]  ; clk        ; clk      ; None                       ; None                       ; 0.634 ns                 ;
; Not operational: Clock Skew > Data Delay ; SREG8B:inst1|reg8[6]  ; SREG8B:inst1|reg8[5]  ; clk        ; clk      ; None                       ; None                       ; 0.635 ns                 ;
; Not operational: Clock Skew > Data Delay ; SREG8B:inst1|reg8[4]  ; SREG8B:inst1|reg8[3]  ; clk        ; clk      ; None                       ; None                       ; 0.636 ns                 ;
; Not operational: Clock Skew > Data Delay ; SREG8B:inst1|reg8[1]  ; SREG8B:inst1|reg8[0]  ; clk        ; clk      ; None                       ; None                       ; 0.668 ns                 ;
; Not operational: Clock Skew > Data Delay ; REG16B:inst3|r16s[10] ; REG16B:inst3|r16s[9]  ; clk        ; clk      ; None                       ; None                       ; 0.855 ns                 ;
; Not operational: Clock Skew > Data Delay ; SREG8B:inst1|reg8[5]  ; SREG8B:inst1|reg8[4]  ; clk        ; clk      ; None                       ; None                       ; 0.856 ns                 ;
; Not operational: Clock Skew > Data Delay ; REG16B:inst3|r16s[12] ; REG16B:inst3|r16s[11] ; clk        ; clk      ; None                       ; None                       ; 0.857 ns                 ;
; Not operational: Clock Skew > Data Delay ; REG16B:inst3|r16s[15] ; REG16B:inst3|r16s[14] ; clk        ; clk      ; None                       ; None                       ; 0.861 ns                 ;
; Not operational: Clock Skew > Data Delay ; REG16B:inst3|r16s[11] ; REG16B:inst3|r16s[10] ; clk        ; clk      ; None                       ; None                       ; 0.862 ns                 ;
+------------------------------------------+-----------------------+-----------------------+------------+----------+----------------------------+----------------------------+--------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Hold: 'start'                                                                                                                                                                                 ;
+------------------------------------------+----------------------+----------------------+------------+----------+----------------------------+----------------------------+--------------------------+
; Minimum Slack                            ; From                 ; To                   ; From Clock ; To Clock ; Required Hold Relationship ; Required Shortest P2P Time ; Actual Shortest P2P Time ;
+------------------------------------------+----------------------+----------------------+------------+----------+----------------------------+----------------------------+--------------------------+
; Not operational: Clock Skew > Data Delay ; SREG8B:inst1|reg8[7] ; SREG8B:inst1|reg8[6] ; start      ; start    ; None                       ; None                       ; 0.114 ns                 ;
+------------------------------------------+----------------------+----------------------+------------+----------+----------------------------+----------------------------+--------------------------+


+-----------------------------------------------------------------------------+
; tsu                                                                         ;
+-------+--------------+------------+------+-----------------------+----------+
; Slack ; Required tsu ; Actual tsu ; From ; To                    ; To Clock ;
+-------+--------------+------------+------+-----------------------+----------+
; N/A   ; None         ; 5.015 ns   ; a[7] ; SREG8B:inst1|reg8[7]  ; start    ;
; N/A   ; None         ; 2.704 ns   ; b[2] ; REG16B:inst3|r16s[15] ; clk      ;
; N/A   ; None         ; 2.704 ns   ; b[2] ; REG16B:inst3|r16s[14] ; clk      ;
; N/A   ; None         ; 2.704 ns   ; b[2] ; REG16B:inst3|r16s[12] ; clk      ;
; N/A   ; None         ; 2.704 ns   ; b[2] ; REG16B:inst3|r16s[13] ; clk      ;
; N/A   ; None         ; 2.538 ns   ; b[2] ; REG16B:inst3|r16s[11] ; clk      ;
; N/A   ; None         ; 2.476 ns   ; b[2] ; REG16B:inst3|r16s[10] ; clk      ;
; N/A   ; None         ; 2.437 ns   ; b[2] ; REG16B:inst3|r16s[15] ; start    ;
; N/A   ; None         ; 2.437 ns   ; b[2] ; REG16B:inst3|r16s[14] ; start    ;
; N/A   ; None         ; 2.437 ns   ; b[2] ; REG16B:inst3|r16s[12] ; start    ;

⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -