multi8x8.sim.rpt

VHDL实现的8位乘法器

; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|datab_node[0]~0                                   ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|datab_node[0]~0                                        ; out0             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|datab_node[0]                                     ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|datab_node[0]                                          ; out0             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|_~1                                               ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|_~1                                                    ; out0             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|_~2                                               ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|_~2                                                    ; out0             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|datab_node[3]~1                                   ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|datab_node[3]~1                                        ; out0             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|datab_node[3]                                     ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|datab_node[3]                                          ; out0             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|datab_node[2]                                     ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|datab_node[2]                                          ; out0             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|datab_node[1]                                     ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|datab_node[1]                                          ; out0             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|_~4                                               ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|_~4                                                    ; out0             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|_~5                                               ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|_~5                                                    ; out0             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|_~6                                               ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|_~6                                                    ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|result_node[4]                                 ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|result_node[4]                                      ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|datab_node[0]~0                  ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|datab_node[0]~0                       ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|datab_node[0]                    ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|datab_node[0]                         ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~0                              ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~0                                   ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~2                              ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~2                                   ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~3                              ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~3                                   ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|datab_node[4]~1                  ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|datab_node[4]~1                       ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|datab_node[4]                    ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|datab_node[4]                         ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|datab_node[3]                    ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|datab_node[3]                         ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|datab_node[2]                    ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|datab_node[2]                         ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|datab_node[1]                    ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|datab_node[1]                         ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|unreg_res_node[4]~1              ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|unreg_res_node[4]~1                   ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|unreg_res_node[4]                ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|unreg_res_node[4]                     ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~4                              ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~4                                   ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~5                              ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~5                                   ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~6                              ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~6                                   ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~7                              ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~7                                   ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~8                              ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~8                                   ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~12                             ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~12                                  ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~13                             ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~13                                  ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~14                             ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~14                                  ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~15                             ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~15                                  ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~16                             ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~16                                  ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~17                             ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~17                                  ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~18                             ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~18                                  ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~19                             ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~19                                  ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[4]  ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]  ; sout             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[3]  ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[3]       ; cout             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[2]  ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[2]       ; cout             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[1]  ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[1]       ; cout             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[0]  ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[0]       ; cout             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|result_node[4]                                 ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|result_node[4]                                      ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|datab_node[0]~0                  ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|datab_node[0]~0                       ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|_~2                              ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|_~2                                   ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|datab_node[4]~1                  ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|datab_node[4]~1                       ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|datab_node[4]                    ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|datab_node[4]                         ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|datab_node[3]                    ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|datab_node[3]                         ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|unreg_res_node[4]~1              ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|unreg_res_node[4]~1                   ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|unreg_res_node[3]~2              ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|unreg_res_node[3]~2                   ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|unreg_res_node[4]                ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|unreg_res_node[4]                     ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|_~4                              ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|_~4                                   ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|_~5                              ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|_~5                                   ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|_~8                              ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|_~8                                   ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|_~9                              ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|_~9                                   ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|_~12                             ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|_~12                                  ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|_~13                             ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|_~13                                  ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|_~16                             ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|_~16                                  ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|_~17                             ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|_~17                                  ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[4]  ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]  ; sout             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[3]  ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[3]       ; cout             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst5|lpm_add_sub:add_rtl_1|result_node[0]                                ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst5|lpm_add_sub:add_rtl_1|result_node[0]                                     ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst5|lpm_add_sub:add_rtl_1|result_node[1]                                ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst5|lpm_add_sub:add_rtl_1|result_node[1]                                     ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst5|lpm_add_sub:add_rtl_1|result_node[2]                                ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst5|lpm_add_sub:add_rtl_1|result_node[2]                                     ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst5|lpm_add_sub:add_rtl_1|result_node[3]                                ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst5|lpm_add_sub:add_rtl_1|result_node[3]                                     ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst5|lpm_add_sub:add_rtl_1|result_node[4]                                ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst5|lpm_add_sub:add_rtl_1|result_node[4]                                     ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst5|lpm_add_sub:add_rtl_1|addcore:adder|datab_node[0]~0                 ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst5|lpm_add_sub:add_rtl_1|addcore:adder|datab_node[0]~0                      ; out0             ;
; |multi8x