multi8x8.sim.rpt

VHDL实现的8位乘法器

; |multi8x8|REG16B:inst3|r16s[7]                                                                             ; |multi8x8|REG16B:inst3|r16s[7]                                                                                  ; out              ;
; |multi8x8|REG16B:inst3|r16s[6]                                                                             ; |multi8x8|REG16B:inst3|r16s[6]                                                                                  ; out              ;
; |multi8x8|REG16B:inst3|r16s[5]                                                                             ; |multi8x8|REG16B:inst3|r16s[5]                                                                                  ; out              ;
; |multi8x8|REG16B:inst3|r16s[4]                                                                             ; |multi8x8|REG16B:inst3|r16s[4]                                                                                  ; out              ;
; |multi8x8|REG16B:inst3|r16s[3]                                                                             ; |multi8x8|REG16B:inst3|r16s[3]                                                                                  ; out              ;
; |multi8x8|REG16B:inst3|r16s[2]                                                                             ; |multi8x8|REG16B:inst3|r16s[2]                                                                                  ; out              ;
; |multi8x8|REG16B:inst3|r16s[1]                                                                             ; |multi8x8|REG16B:inst3|r16s[1]                                                                                  ; out              ;
; |multi8x8|ARICTL:inst|cnt4b[2]                                                                             ; |multi8x8|ARICTL:inst|cnt4b[2]                                                                                  ; out              ;
; |multi8x8|ARICTL:inst|cnt4b[1]                                                                             ; |multi8x8|ARICTL:inst|cnt4b[1]                                                                                  ; out              ;
; |multi8x8|ARICTL:inst|cnt4b[0]                                                                             ; |multi8x8|ARICTL:inst|cnt4b[0]                                                                                  ; out              ;
; |multi8x8|ARICTL:inst|clkout~0                                                                             ; |multi8x8|ARICTL:inst|clkout~0                                                                                  ; out              ;
; |multi8x8|ARICTL:inst|clkout                                                                               ; |multi8x8|ARICTL:inst|clkout                                                                                    ; out              ;
; |multi8x8|ARICTL:inst|ariend                                                                               ; |multi8x8|ARICTL:inst|ariend                                                                                    ; out              ;
; |multi8x8|ARICTL:inst|cnt4b[3]                                                                             ; |multi8x8|ARICTL:inst|cnt4b[3]                                                                                  ; out              ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|result_node[0]                                                 ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|result_node[0]                                                      ; out0             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|result_node[1]                                                 ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|result_node[1]                                                      ; out0             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|result_node[2]                                                 ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|result_node[2]                                                      ; out0             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|result_node[3]                                                 ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|result_node[3]                                                      ; out0             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|unreg_res_node[0]~0                              ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|unreg_res_node[0]~0                                   ; out0             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|unreg_res_node[0]                                ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|unreg_res_node[0]                                     ; out0             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|_~0                                              ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|_~0                                                   ; out0             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|_~3                                              ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|_~3                                                   ; out0             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|unreg_res_node[3]~1                              ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|unreg_res_node[3]~1                                   ; out0             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|unreg_res_node[2]~2                              ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|unreg_res_node[2]~2                                   ; out0             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|unreg_res_node[1]~3                              ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|unreg_res_node[1]~3                                   ; out0             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|unreg_res_node[3]                                ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|unreg_res_node[3]                                     ; out0             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|unreg_res_node[2]                                ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|unreg_res_node[2]                                     ; out0             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|unreg_res_node[1]                                ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|unreg_res_node[1]                                     ; out0             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|_~7                                              ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|_~7                                                   ; out0             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|_~8                                              ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|_~8                                                   ; out0             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|_~9                                              ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|_~9                                                   ; out0             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|_~10                                             ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|_~10                                                  ; out0             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|_~11                                             ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|_~11                                                  ; out0             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|_~12                                             ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|_~12                                                  ; out0             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|_~13                                             ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|_~13                                                  ; out0             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|_~14                                             ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|_~14                                                  ; out0             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|_~15                                             ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|_~15                                                  ; out0             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|a_csnbuffer:result_node|cout[3]                  ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]                  ; sout             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|a_csnbuffer:result_node|cout[2]                  ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|a_csnbuffer:result_node|cout[2]                       ; cout             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|a_csnbuffer:result_node|cout[2]                  ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]                  ; sout             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|a_csnbuffer:result_node|cout[1]                  ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|a_csnbuffer:result_node|cout[1]                       ; cout             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|a_csnbuffer:result_node|cout[1]                  ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]                  ; sout             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|a_csnbuffer:result_node|cout[0]                  ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|a_csnbuffer:result_node|cout[0]                       ; cout             ;
; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|a_csnbuffer:result_node|cout[0]                  ; |multi8x8|ARICTL:inst|lpm_add_sub:add_rtl_4|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]                  ; sout             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|result_node[0]                                ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|result_node[0]                                     ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|result_node[1]                                ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|result_node[1]                                     ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|result_node[2]                                ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|result_node[2]                                     ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|result_node[3]                                ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|result_node[3]                                     ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|unreg_res_node[0]~0             ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|unreg_res_node[0]~0                  ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|unreg_res_node[0]               ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|unreg_res_node[0]                    ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~1                             ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~1                                  ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|unreg_res_node[3]~2             ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|unreg_res_node[3]~2                  ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|unreg_res_node[2]~3             ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|unreg_res_node[2]~3                  ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|unreg_res_node[1]~4             ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|unreg_res_node[1]~4                  ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|unreg_res_node[3]               ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|unreg_res_node[3]                    ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|unreg_res_node[2]               ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|unreg_res_node[2]                    ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|unreg_res_node[1]               ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|unreg_res_node[1]                    ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~9                             ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~9                                  ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~10                            ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~10                                 ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~11                            ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|_~11                                 ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[3] ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[3] ; sout             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[2] ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[2] ; sout             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[1] ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[1] ; sout             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cout[0] ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[0] ; sout             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|result_node[0]                                ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|result_node[0]                                     ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|result_node[1]                                ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|result_node[1]                                     ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|result_node[2]                                ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|result_node[2]                                     ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|result_node[3]                                ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|result_node[3]                                     ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|datab_node[0]                   ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|datab_node[0]                        ; out0             ;
; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|unreg_res_node[0]~0             ; |multi8x8|ADDER8B:inst2|add4b:b2v_inst|lpm_add_sub:add_rtl_2|addcore:adder|unreg_res_node[0]~0                  ; out0             ;