de2_synthesizer.map.rpt
来自「build synthesizer on a de2 dev fpga boar」· RPT 代码 · 共 668 行 · 第 1/5 页
RPT
668 行
+--------------------------------------------------------------------------------+--------------------+--------------------+
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Source Files Read ;
+----------------------------------+-----------------+------------------------------+-----------------------------------------------------------------------------------------------+
; File Name with User-Entered Path ; Used in Netlist ; File Type ; File Name with Absolute Path ;
+----------------------------------+-----------------+------------------------------+-----------------------------------------------------------------------------------------------+
; adio_codec.v ; yes ; User Verilog HDL File ; C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/adio_codec.v ;
; bar_big.v ; yes ; User Verilog HDL File ; C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/bar_big.v ;
; bar_blank.v ; yes ; User Verilog HDL File ; C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/bar_blank.v ;
; bar_white.v ; yes ; User Verilog HDL File ; C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/bar_white.v ;
; DE2_synthesizer.v ; yes ; User Verilog HDL File ; C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/DE2_synthesizer.v ;
; demo_sound1.v ; yes ; User Verilog HDL File ; C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/demo_sound1.v ;
; demo_sound2.v ; yes ; User Verilog HDL File ; C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/demo_sound2.v ;
; I2C_AV_Config.v ; yes ; User Verilog HDL File ; C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/I2C_AV_Config.v ;
; I2C_Controller.v ; yes ; User Verilog HDL File ; C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/I2C_Controller.v ;
; LCD_Controller.v ; yes ; User Verilog HDL File ; C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/LCD_Controller.v ;
; LCD_TEST.v ; yes ; User Verilog HDL File ; C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/LCD_TEST.v ;
; PS2_KEYBOARD.v ; yes ; User Verilog HDL File ; C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/PS2_KEYBOARD.v ;
; SEG7_LUT.v ; yes ; User Verilog HDL File ; C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/SEG7_LUT.v ;
; SEG7_LUT_8.v ; yes ; User Verilog HDL File ; C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/SEG7_LUT_8.v ;
; staff.v ; yes ; User Verilog HDL File ; C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/staff.v ;
; VGA_Audio_PLL.v ; yes ; User Verilog HDL File ; C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/VGA_Audio_PLL.v ;
; vga_time_generator.v ; yes ; User Verilog HDL File ; C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/vga_time_generator.v ;
; wave_gen_brass.v ; yes ; User Verilog HDL File ; C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/wave_gen_brass.v ;
; wave_gen_string.v ; yes ; User Verilog HDL File ; C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/wave_gen_string.v ;
; altpll.tdf ; yes ; Megafunction ; c:/altera/71/quartus/libraries/megafunctions/altpll.tdf ;
; aglobal71.inc ; yes ; Megafunction ; c:/altera/71/quartus/libraries/megafunctions/aglobal71.inc ;
; stratix_pll.inc ; yes ; Megafunction ; c:/altera/71/quartus/libraries/megafunctions/stratix_pll.inc ;
; stratixii_pll.inc ; yes ; Megafunction ; c:/altera/71/quartus/libraries/megafunctions/stratixii_pll.inc ;
; cycloneii_pll.inc ; yes ; Megafunction ; c:/altera/71/quartus/libraries/megafunctions/cycloneii_pll.inc ;
; altsyncram.tdf ; yes ; Megafunction ; c:/altera/71/quartus/libraries/megafunctions/altsyncram.tdf ;
; stratix_ram_block.inc ; yes ; Megafunction ; c:/altera/71/quartus/libraries/megafunctions/stratix_ram_block.inc ;
; lpm_mux.inc ; yes ; Megafunction ; c:/altera/71/quartus/libraries/megafunctions/lpm_mux.inc ;
; lpm_decode.inc ; yes ; Megafunction ; c:/altera/71/quartus/libraries/megafunctions/lpm_decode.inc ;
; a_rdenreg.inc ; yes ; Megafunction ; c:/altera/71/quartus/libraries/megafunctions/a_rdenreg.inc ;
; altrom.inc ; yes ; Megafunction ; c:/altera/71/quartus/libraries/megafunctions/altrom.inc ;
; altram.inc ; yes ; Megafunction ; c:/altera/71/quartus/libraries/megafunctions/altram.inc ;
; altdpram.inc ; yes ; Megafunction ; c:/altera/71/quartus/libraries/megafunctions/altdpram.inc ;
; altqpram.inc ; yes ; Megafunction ; c:/altera/71/quartus/libraries/megafunctions/altqpram.inc ;
; db/altsyncram_2901.tdf ; yes ; Auto-Generated Megafunction ; C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/db/altsyncram_2901.tdf ;
+----------------------------------+-----------------+------------------------------+-----------------------------------------------------------------------------------------------+
+-----------------------------------------------------+
; Analysis & Synthesis Resource Usage Summary ;
+---------------------------------------------+-------+
; Resource ; Usage ;
+---------------------------------------------+-------+
; Estimated Total logic elements ; 1,597 ;
; ; ;
; Total combinational functions ; 1597 ;
; Logic element usage by number of LUT inputs ; ;
; -- 4 input functions ; 955 ;
; -- 3 input functions ; 305 ;
; -- <=2 input functions ; 337 ;
; ; ;
; Logic elements by mode ; ;
; -- normal mode ; 1314 ;
; -- arithmetic mode ; 283 ;
; ; ;
; Total registers ; 358 ;
; -- Dedicated logic registers ; 358 ;
; -- I/O registers ; 0 ;
; ; ;
; I/O pins ; 423 ;
; Total memory bits ; 1024 ;
; Total PLLs ; 1 ;
; Maximum fan-out node ; SW[0] ;
; Maximum fan-out ; 214 ;
; Total fan-out ; 6809 ;
; Average fan-out ; 2.84 ;
+---------------------------------------------+-------+
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity ;
+-------------------------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+----------------------------------------------------------------------------------------+--------------+
; Compilation Hierarchy Node ; LC Combinationals ; LC Registers ; Memory Bits ; DSP Elements ; DSP 9x9 ; DSP 18x18 ; Pins ; Virtual Pins ; Full Hierarchy Name ; Library Name ;
+-------------------------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+----------------------------------------------------------------------------------------+--------------+
; |DE2_synthesizer ; 1597 (50) ; 358 (19) ; 1024 ; 0 ; 0 ; 0 ; 423 ; 0 ; |DE2_synthesizer ; work ;
; |I2C_AV_Config:u7| ; 88 (40) ; 58 (29) ; 1024 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_synthesizer|I2C_AV_Config:u7 ; work ;
; |I2C_Controller:u0| ; 48 (48) ; 29 (29) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_synthesizer|I2C_AV_Config:u7|I2C_Controller:u0 ; work ;
; |altsyncram:Ram0_rtl_0| ; 0 (0) ; 0 (0) ; 1024 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_synthesizer|I2C_AV_Config:u7|altsyncram:Ram0_rtl_0 ; work ;
; |altsyncram_2901:auto_generated| ; 0 (0) ; 0 (0) ; 1024 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_synthesizer|I2C_AV_Config:u7|altsyncram:Ram0_rtl_0|altsyncram_2901:auto_generated ; work ;
; |LCD_TEST:u5| ; 85 (66) ; 51 (38) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_synthesizer|LCD_TEST:u5 ; work ;
; |LCD_Controller:u0| ; 19 (19) ; 13 (13) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_synthesizer|LCD_TEST:u5|LCD_Controller:u0 ; work ;
; |PS2_KEYBOARD:keyboard| ; 86 (86) ; 54 (54) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_synthesizer|PS2_KEYBOARD:keyboard ; work ;
; |VGA_Audio_PLL:u1| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_synthesizer|VGA_Audio_PLL:u1 ; work ;
; |altpll:altpll_component| ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_synthesizer|VGA_Audio_PLL:u1|altpll:altpll_component ; work ;
; |adio_codec:ad1| ; 446 (446) ; 50 (50) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_synthesizer|adio_codec:ad1 ; work ;
; |demo_sound1:dd1| ; 192 (192) ; 37 (37) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_synthesizer|demo_sound1:dd1 ; work ;
; |demo_sound2:dd2| ; 186 (186) ; 37 (37) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_synthesizer|demo_sound2:dd2 ; work ;
; |staff:st1| ; 464 (342) ; 52 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_synthesizer|staff:st1 ; work ;
; |bar_big:b0| ; 7 (7) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_synthesizer|staff:st1|bar_big:b0 ; work ;
; |bar_big:b2| ; 2 (2) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_synthesizer|staff:st1|bar_big:b2 ; work ;
; |bar_blank:bar_blank1| ; 16 (16) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_synthesizer|staff:st1|bar_blank:bar_blank1 ; work ;
; |bar_white:bar1| ; 16 (16) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_synthesizer|staff:st1|bar_white:bar1 ; work ;
; |vga_time_generator:vga0| ; 81 (81) ; 52 (52) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |DE2_synthesizer|staff:st1|vga_time_generator:vga0 ; work ;
+-------------------------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+----------------------------------------------------------------------------------------+--------------+
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis RAM Summary ;
+----------------------------------------------------------------------------------+------+------+--------------+--------------+--------------+--------------+------+--------------------------+
; Name ; Type ; Mode ; Port A Depth ; Port A Width ; Port B Depth ; Port B Width ; Size ; MIF ;
+----------------------------------------------------------------------------------+------+------+--------------+--------------+--------------+--------------+------+--------------------------+
; I2C_AV_Config:u7|altsyncram:Ram0_rtl_0|altsyncram_2901:auto_generated|ALTSYNCRAM ; AUTO ; ROM ; 64 ; 16 ; -- ; -- ; 1024 ; DE2_synthesizer0.rtl.mif ;
+----------------------------------------------------------------------------------+------+------+--------------+--------------+--------------+--------------+------+--------------------------+
Encoding Type: One-Hot
+------------------------------------------------------------------------------------+
; State Machine - |DE2_synthesizer|LCD_TEST:u5|mLCD_ST ;
+----------------+----------------+----------------+----------------+----------------+
; Name ; mLCD_ST.000011 ; mLCD_ST.000001 ; mLCD_ST.000010 ; mLCD_ST.000000 ;
+----------------+----------------+----------------+----------------+----------------+
; mLCD_ST.000000 ; 0 ; 0 ; 0 ; 0 ;
; mLCD_ST.000010 ; 0 ; 0 ; 1 ; 1 ;
; mLCD_ST.000001 ; 0 ; 1 ; 0 ; 1 ;
; mLCD_ST.000011 ; 1 ; 0 ; 0 ; 1 ;
+----------------+----------------+----------------+----------------+----------------+
Encoding Type: One-Hot
+-------------------------------------------------------------------+
; State Machine - |DE2_synthesizer|LCD_TEST:u5|LCD_Controller:u0|ST ;
+-------+-------+-------+-------+-----------------------------------+
; Name ; ST.11 ; ST.01 ; ST.10 ; ST.00 ;
+-------+-------+-------+-------+-----------------------------------+
; ST.00 ; 0 ; 0 ; 0 ; 0 ;
; ST.10 ; 0 ; 0 ; 1 ; 1 ;
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