de2_synthesizer.hier_info

build synthesizer on a de2 dev fpga board

|DE2_synthesizer
CLOCK_27 => CLOCK_27~0.IN1
CLOCK_50 => CLOCK_50~0.IN2
EXT_CLOCK => ~NO_FANOUT~
KEY[0] => KEY[0]~3.IN2
KEY[1] => KEY[1]~2.IN2
KEY[2] => KEY[2]~1.IN1
KEY[3] => KEY[3]~0.IN1
SW[0] => SW[0]~0.IN1
SW[1] => comb~16.IN1
SW[2] => comb~17.IN1
SW[3] => ~NO_FANOUT~
SW[4] => ~NO_FANOUT~
SW[5] => ~NO_FANOUT~
SW[6] => ~NO_FANOUT~
SW[7] => ~NO_FANOUT~
SW[8] => ~NO_FANOUT~
SW[9] => comb~7.OUTPUTSELECT
SW[9] => comb~6.OUTPUTSELECT
SW[9] => comb~5.OUTPUTSELECT
SW[9] => comb~4.OUTPUTSELECT
SW[9] => comb~3.OUTPUTSELECT
SW[9] => comb~2.OUTPUTSELECT
SW[9] => comb~1.OUTPUTSELECT
SW[9] => comb~0.OUTPUTSELECT
SW[9] => comb~15.OUTPUTSELECT
SW[9] => comb~14.OUTPUTSELECT
SW[9] => comb~13.OUTPUTSELECT
SW[9] => comb~12.OUTPUTSELECT
SW[9] => comb~11.OUTPUTSELECT
SW[9] => comb~10.OUTPUTSELECT
SW[9] => comb~9.OUTPUTSELECT
SW[9] => comb~8.OUTPUTSELECT
SW[10] => ~NO_FANOUT~
SW[11] => ~NO_FANOUT~
SW[12] => ~NO_FANOUT~
SW[13] => ~NO_FANOUT~
SW[14] => ~NO_FANOUT~
SW[15] => ~NO_FANOUT~
SW[16] => ~NO_FANOUT~
SW[17] => ~NO_FANOUT~
HEX0[0] <= SEG7_LUT_8:u0.port0
HEX0[1] <= SEG7_LUT_8:u0.port0
HEX0[2] <= SEG7_LUT_8:u0.port0
HEX0[3] <= SEG7_LUT_8:u0.port0
HEX0[4] <= SEG7_LUT_8:u0.port0
HEX0[5] <= SEG7_LUT_8:u0.port0
HEX0[6] <= SEG7_LUT_8:u0.port0
HEX1[0] <= SEG7_LUT_8:u0.port1
HEX1[1] <= SEG7_LUT_8:u0.port1
HEX1[2] <= SEG7_LUT_8:u0.port1
HEX1[3] <= SEG7_LUT_8:u0.port1
HEX1[4] <= SEG7_LUT_8:u0.port1
HEX1[5] <= SEG7_LUT_8:u0.port1
HEX1[6] <= SEG7_LUT_8:u0.port1
HEX2[0] <= SEG7_LUT_8:u0.port2
HEX2[1] <= SEG7_LUT_8:u0.port2
HEX2[2] <= SEG7_LUT_8:u0.port2
HEX2[3] <= SEG7_LUT_8:u0.port2
HEX2[4] <= SEG7_LUT_8:u0.port2
HEX2[5] <= SEG7_LUT_8:u0.port2
HEX2[6] <= SEG7_LUT_8:u0.port2
HEX3[0] <= SEG7_LUT_8:u0.port3
HEX3[1] <= SEG7_LUT_8:u0.port3
HEX3[2] <= SEG7_LUT_8:u0.port3
HEX3[3] <= SEG7_LUT_8:u0.port3
HEX3[4] <= SEG7_LUT_8:u0.port3
HEX3[5] <= SEG7_LUT_8:u0.port3
HEX3[6] <= SEG7_LUT_8:u0.port3
HEX4[0] <= SEG7_LUT_8:u0.port4
HEX4[1] <= SEG7_LUT_8:u0.port4
HEX4[2] <= SEG7_LUT_8:u0.port4
HEX4[3] <= SEG7_LUT_8:u0.port4
HEX4[4] <= SEG7_LUT_8:u0.port4
HEX4[5] <= SEG7_LUT_8:u0.port4
HEX4[6] <= SEG7_LUT_8:u0.port4
HEX5[0] <= SEG7_LUT_8:u0.port5
HEX5[1] <= SEG7_LUT_8:u0.port5
HEX5[2] <= SEG7_LUT_8:u0.port5
HEX5[3] <= SEG7_LUT_8:u0.port5
HEX5[4] <= SEG7_LUT_8:u0.port5
HEX5[5] <= SEG7_LUT_8:u0.port5
HEX5[6] <= SEG7_LUT_8:u0.port5
HEX6[0] <= SEG7_LUT_8:u0.port6
HEX6[1] <= SEG7_LUT_8:u0.port6
HEX6[2] <= SEG7_LUT_8:u0.port6
HEX6[3] <= SEG7_LUT_8:u0.port6
HEX6[4] <= SEG7_LUT_8:u0.port6
HEX6[5] <= SEG7_LUT_8:u0.port6
HEX6[6] <= SEG7_LUT_8:u0.port6
HEX7[0] <= SEG7_LUT_8:u0.port7
HEX7[1] <= SEG7_LUT_8:u0.port7
HEX7[2] <= SEG7_LUT_8:u0.port7
HEX7[3] <= SEG7_LUT_8:u0.port7
HEX7[4] <= SEG7_LUT_8:u0.port7
HEX7[5] <= SEG7_LUT_8:u0.port7
HEX7[6] <= SEG7_LUT_8:u0.port7
LEDG[0] <= PS2_KEYBOARD:keyboard.scandata
LEDG[1] <= PS2_KEYBOARD:keyboard.scandata
LEDG[2] <= PS2_KEYBOARD:keyboard.scandata
LEDG[3] <= PS2_KEYBOARD:keyboard.scandata
LEDG[4] <= PS2_KEYBOARD:keyboard.scandata
LEDG[5] <= PS2_KEYBOARD:keyboard.scandata
LEDG[6] <= PS2_KEYBOARD:keyboard.scandata
LEDG[7] <= PS2_KEYBOARD:keyboard.scandata
LEDG[8] <= <GND>
LEDR[0] <= <GND>
LEDR[1] <= <GND>
LEDR[2] <= <GND>
LEDR[3] <= <GND>
LEDR[4] <= <GND>
LEDR[5] <= <GND>
LEDR[6] <= staff:st1.sound_off1
LEDR[7] <= staff:st1.sound_off2
LEDR[8] <= staff:st1.sound_off3
LEDR[9] <= staff:st1.sound_off4
LEDR[10] <= <GND>
LEDR[11] <= <GND>
LEDR[12] <= <GND>
LEDR[13] <= <GND>
LEDR[14] <= <GND>
LEDR[15] <= <GND>
LEDR[16] <= <GND>
LEDR[17] <= <GND>
UART_TXD <= <GND>
UART_RXD => ~NO_FANOUT~
IRDA_TXD <= <GND>
IRDA_RXD => ~NO_FANOUT~
DRAM_DQ[0] <= DRAM_DQ[0]~0
DRAM_DQ[1] <= DRAM_DQ[1]~1
DRAM_DQ[2] <= DRAM_DQ[2]~2
DRAM_DQ[3] <= DRAM_DQ[3]~3
DRAM_DQ[4] <= DRAM_DQ[4]~4
DRAM_DQ[5] <= DRAM_DQ[5]~5
DRAM_DQ[6] <= DRAM_DQ[6]~6
DRAM_DQ[7] <= DRAM_DQ[7]~7
DRAM_DQ[8] <= DRAM_DQ[8]~8
DRAM_DQ[9] <= DRAM_DQ[9]~9
DRAM_DQ[10] <= DRAM_DQ[10]~10
DRAM_DQ[11] <= DRAM_DQ[11]~11
DRAM_DQ[12] <= DRAM_DQ[12]~12
DRAM_DQ[13] <= DRAM_DQ[13]~13
DRAM_DQ[14] <= DRAM_DQ[14]~14
DRAM_DQ[15] <= DRAM_DQ[15]~16
DRAM_ADDR[0] <= <GND>
DRAM_ADDR[1] <= <GND>
DRAM_ADDR[2] <= <GND>
DRAM_ADDR[3] <= <GND>
DRAM_ADDR[4] <= <GND>
DRAM_ADDR[5] <= <GND>
DRAM_ADDR[6] <= <GND>
DRAM_ADDR[7] <= <GND>
DRAM_ADDR[8] <= <GND>
DRAM_ADDR[9] <= <GND>
DRAM_ADDR[10] <= <GND>
DRAM_ADDR[11] <= <GND>
DRAM_LDQM <= <GND>
DRAM_UDQM <= <GND>
DRAM_WE_N <= <GND>
DRAM_CAS_N <= <GND>
DRAM_RAS_N <= <GND>
DRAM_CS_N <= <GND>
DRAM_BA_0 <= <GND>
DRAM_BA_1 <= <GND>
DRAM_CLK <= <GND>
DRAM_CKE <= <GND>
FL_DQ[0] <= FL_DQ[0]~0
FL_DQ[1] <= FL_DQ[1]~1
FL_DQ[2] <= FL_DQ[2]~2
FL_DQ[3] <= FL_DQ[3]~3
FL_DQ[4] <= FL_DQ[4]~4
FL_DQ[5] <= FL_DQ[5]~5
FL_DQ[6] <= FL_DQ[6]~6
FL_DQ[7] <= FL_DQ[7]~7
FL_ADDR[0] <= <GND>
FL_ADDR[1] <= <GND>
FL_ADDR[2] <= <GND>
FL_ADDR[3] <= <GND>
FL_ADDR[4] <= <GND>
FL_ADDR[5] <= <GND>
FL_ADDR[6] <= <GND>
FL_ADDR[7] <= <GND>
FL_ADDR[8] <= <GND>
FL_ADDR[9] <= <GND>
FL_ADDR[10] <= <GND>
FL_ADDR[11] <= <GND>
FL_ADDR[12] <= <GND>
FL_ADDR[13] <= <GND>
FL_ADDR[14] <= <GND>
FL_ADDR[15] <= <GND>
FL_ADDR[16] <= <GND>
FL_ADDR[17] <= <GND>
FL_ADDR[18] <= <GND>
FL_ADDR[19] <= <GND>
FL_WE_N <= <GND>
FL_RST_N <= <GND>
FL_OE_N <= <GND>
FL_CE_N <= <GND>
SRAM_DQ[0] <= SRAM_DQ[0]~0
SRAM_DQ[1] <= SRAM_DQ[1]~1
SRAM_DQ[2] <= SRAM_DQ[2]~2
SRAM_DQ[3] <= SRAM_DQ[3]~3
SRAM_DQ[4] <= SRAM_DQ[4]~4
SRAM_DQ[5] <= SRAM_DQ[5]~5
SRAM_DQ[6] <= SRAM_DQ[6]~6
SRAM_DQ[7] <= SRAM_DQ[7]~7
SRAM_DQ[8] <= SRAM_DQ[8]~8
SRAM_DQ[9] <= SRAM_DQ[9]~9
SRAM_DQ[10] <= SRAM_DQ[10]~10
SRAM_DQ[11] <= SRAM_DQ[11]~11
SRAM_DQ[12] <= SRAM_DQ[12]~12
SRAM_DQ[13] <= SRAM_DQ[13]~13
SRAM_DQ[14] <= SRAM_DQ[14]~14
SRAM_DQ[15] <= SRAM_DQ[15]~15
SRAM_ADDR[0] <= <GND>
SRAM_ADDR[1] <= <GND>
SRAM_ADDR[2] <= <GND>
SRAM_ADDR[3] <= <GND>
SRAM_ADDR[4] <= <GND>
SRAM_ADDR[5] <= <GND>
SRAM_ADDR[6] <= <GND>
SRAM_ADDR[7] <= <GND>
SRAM_ADDR[8] <= <GND>
SRAM_ADDR[9] <= <GND>
SRAM_ADDR[10] <= <GND>
SRAM_ADDR[11] <= <GND>
SRAM_ADDR[12] <= <GND>
SRAM_ADDR[13] <= <GND>
SRAM_ADDR[14] <= <GND>
SRAM_ADDR[15] <= <GND>
SRAM_ADDR[16] <= <GND>
SRAM_ADDR[17] <= <GND>
SRAM_UB_N <= <GND>
SRAM_LB_N <= <GND>
SRAM_WE_N <= <GND>
SRAM_CE_N <= <GND>
SRAM_OE_N <= <GND>
OTG_DATA[0] <= <UNC>
OTG_DATA[1] <= <UNC>
OTG_DATA[2] <= <UNC>
OTG_DATA[3] <= <UNC>
OTG_DATA[4] <= <UNC>
OTG_DATA[5] <= <UNC>
OTG_DATA[6] <= <UNC>
OTG_DATA[7] <= <UNC>
OTG_DATA[8] <= <UNC>
OTG_DATA[9] <= <UNC>
OTG_DATA[10] <= <UNC>
OTG_DATA[11] <= <UNC>
OTG_DATA[12] <= <UNC>
OTG_DATA[13] <= <UNC>
OTG_DATA[14] <= <UNC>
OTG_DATA[15] <= <UNC>
OTG_ADDR[0] <= <GND>
OTG_ADDR[1] <= <GND>
OTG_CS_N <= <GND>
OTG_RD_N <= <GND>
OTG_WR_N <= <GND>
OTG_RST_N <= <GND>
OTG_FSPEED <= <GND>
OTG_LSPEED <= <GND>
OTG_INT0 <= <GND>
OTG_INT1 <= <GND>
OTG_DREQ0 <= <GND>
OTG_DREQ1 <= <GND>
OTG_DACK0_N <= <GND>
OTG_DACK1_N <= <GND>
LCD_ON <= <VCC>
LCD_BLON <= <VCC>
LCD_RW <= LCD_TEST:u5.LCD_RW
LCD_EN <= LCD_TEST:u5.LCD_EN
LCD_RS <= LCD_TEST:u5.LCD_RS
LCD_DATA[0] <= LCD_TEST:u5.LCD_DATA
LCD_DATA[1] <= LCD_TEST:u5.LCD_DATA
LCD_DATA[2] <= LCD_TEST:u5.LCD_DATA
LCD_DATA[3] <= LCD_TEST:u5.LCD_DATA
LCD_DATA[4] <= LCD_TEST:u5.LCD_DATA
LCD_DATA[5] <= LCD_TEST:u5.LCD_DATA
LCD_DATA[6] <= LCD_TEST:u5.LCD_DATA
LCD_DATA[7] <= LCD_TEST:u5.LCD_DATA
SD_DAT <= SD_DAT~0
SD_DAT3 <= <UNC>
SD_CMD <= <UNC>
SD_CLK <= <GND>
TDI => ~NO_FANOUT~
TCK => ~NO_FANOUT~
TCS => ~NO_FANOUT~
TDO <= <GND>
I2C_SDAT <= I2C_AV_Config:u7.I2C_SDAT
I2C_SCLK <= I2C_AV_Config:u7.I2C_SCLK
PS2_DAT <= PS2_KEYBOARD:keyboard.ps2_dat
PS2_CLK => PS2_CLK~0.IN1
VGA_CLK <= VGA_CLK~0.DB_MAX_OUTPUT_PORT_TYPE
VGA_HS <= staff:st1.vga_h_sync
VGA_VS <= staff:st1.vga_v_sync
VGA_BLANK <= staff:st1.inDisplayArea
VGA_SYNC <= staff:st1.vga_sync
VGA_R[0] <= <GND>
VGA_R[1] <= <GND>
VGA_R[2] <= <GND>
VGA_R[3] <= <GND>
VGA_R[4] <= staff:st1.vga_R
VGA_R[5] <= staff:st1.vga_R
VGA_R[6] <= staff:st1.vga_R
VGA_R[7] <= staff:st1.vga_R
VGA_R[8] <= staff:st1.vga_R
VGA_R[9] <= staff:st1.vga_R
VGA_G[0] <= <GND>
VGA_G[1] <= <GND>
VGA_G[2] <= <GND>
VGA_G[3] <= <GND>
VGA_G[4] <= staff:st1.vga_G
VGA_G[5] <= staff:st1.vga_G
VGA_G[6] <= staff:st1.vga_G
VGA_G[7] <= staff:st1.vga_G
VGA_G[8] <= staff:st1.vga_G
VGA_G[9] <= staff:st1.vga_G
VGA_B[0] <= <GND>
VGA_B[1] <= <GND>
VGA_B[2] <= <GND>
VGA_B[3] <= <GND>
VGA_B[4] <= staff:st1.vga_B
VGA_B[5] <= staff:st1.vga_B
VGA_B[6] <= staff:st1.vga_B
VGA_B[7] <= staff:st1.vga_B
VGA_B[8] <= staff:st1.vga_B
VGA_B[9] <= staff:st1.vga_B
ENET_DATA[0] <= <UNC>
ENET_DATA[1] <= <UNC>
ENET_DATA[2] <= <UNC>
ENET_DATA[3] <= <UNC>
ENET_DATA[4] <= <UNC>
ENET_DATA[5] <= <UNC>
ENET_DATA[6] <= <UNC>
ENET_DATA[7] <= <UNC>
ENET_DATA[8] <= <UNC>
ENET_DATA[9] <= <UNC>
ENET_DATA[10] <= <UNC>
ENET_DATA[11] <= <UNC>
ENET_DATA[12] <= <UNC>
ENET_DATA[13] <= <UNC>
ENET_DATA[14] <= <UNC>
ENET_DATA[15] <= <UNC>
ENET_CMD <= <GND>
ENET_CS_N <= <GND>
ENET_WR_N <= <GND>
ENET_RD_N <= <GND>
ENET_RST_N <= <GND>
ENET_INT => ~NO_FANOUT~
ENET_CLK <= <GND>
AUD_ADCLRCK <= AUD_ADCLRCK~0
AUD_ADCDAT => ~NO_FANOUT~
AUD_DACLRCK <= adio_codec:ad1.oAUD_LRCK
AUD_DACDAT <= adio_codec:ad1.oAUD_DATA
AUD_BCLK <= adio_codec:ad1.oAUD_BCK
AUD_XCK <= AUD_CTRL_CLK.DB_MAX_OUTPUT_PORT_TYPE
TD_DATA[0] => ~NO_FANOUT~
TD_DATA[1] => ~NO_FANOUT~
TD_DATA[2] => ~NO_FANOUT~
TD_DATA[3] => ~NO_FANOUT~
TD_DATA[4] => ~NO_FANOUT~
TD_DATA[5] => ~NO_FANOUT~
TD_DATA[6] => ~NO_FANOUT~
TD_DATA[7] => ~NO_FANOUT~
TD_HS => ~NO_FANOUT~
TD_VS => ~NO_FANOUT~
TD_RESET <= <VCC>
GPIO_0[0] <= GPIO_0[0]~0
GPIO_0[1] <= GPIO_0[1]~1
GPIO_0[2] <= GPIO_0[2]~2
GPIO_0[3] <= GPIO_0[3]~3
GPIO_0[4] <= GPIO_0[4]~4
GPIO_0[5] <= GPIO_0[5]~5
GPIO_0[6] <= GPIO_0[6]~6
GPIO_0[7] <= GPIO_0[7]~7
GPIO_0[8] <= GPIO_0[8]~8
GPIO_0[9] <= GPIO_0[9]~9
GPIO_0[10] <= GPIO_0[10]~10
GPIO_0[11] <= GPIO_0[11]~11
GPIO_0[12] <= GPIO_0[12]~12
GPIO_0[13] <= GPIO_0[13]~13
GPIO_0[14] <= GPIO_0[14]~14
GPIO_0[15] <= GPIO_0[15]~15
GPIO_0[16] <= GPIO_0[16]~16
GPIO_0[17] <= GPIO_0[17]~17
GPIO_0[18] <= GPIO_0[18]~18
GPIO_0[19] <= GPIO_0[19]~19
GPIO_0[20] <= GPIO_0[20]~20
GPIO_0[21] <= GPIO_0[21]~21
GPIO_0[22] <= GPIO_0[22]~22
GPIO_0[23] <= GPIO_0[23]~23
GPIO_0[24] <= GPIO_0[24]~24
GPIO_0[25] <= GPIO_0[25]~25
GPIO_0[26] <= GPIO_0[26]~26
GPIO_0[27] <= GPIO_0[27]~27
GPIO_0[28] <= GPIO_0[28]~28
GPIO_0[29] <= GPIO_0[29]~29
GPIO_0[30] <= GPIO_0[30]~30
GPIO_0[31] <= GPIO_0[31]~31
GPIO_0[32] <= GPIO_0[32]~32
GPIO_0[33] <= GPIO_0[33]~33
GPIO_0[34] <= GPIO_0[34]~34
GPIO_0[35] <= GPIO_0[35]~35
GPIO_1[0] <= GPIO_1[0]~0
GPIO_1[1] <= GPIO_1[1]~1
GPIO_1[2] <= GPIO_1[2]~2
GPIO_1[3] <= GPIO_1[3]~3
GPIO_1[4] <= GPIO_1[4]~4
GPIO_1[5] <= GPIO_1[5]~5
GPIO_1[6] <= GPIO_1[6]~6
GPIO_1[7] <= GPIO_1[7]~7
GPIO_1[8] <= GPIO_1[8]~8
GPIO_1[9] <= GPIO_1[9]~9
GPIO_1[10] <= GPIO_1[10]~10
GPIO_1[11] <= GPIO_1[11]~11
GPIO_1[12] <= GPIO_1[12]~12
GPIO_1[13] <= GPIO_1[13]~13
GPIO_1[14] <= GPIO_1[14]~14
GPIO_1[15] <= GPIO_1[15]~15
GPIO_1[16] <= GPIO_1[16]~16
GPIO_1[17] <= GPIO_1[17]~17
GPIO_1[18] <= GPIO_1[18]~18
GPIO_1[19] <= GPIO_1[19]~19
GPIO_1[20] <= GPIO_1[20]~20
GPIO_1[21] <= GPIO_1[21]~21
GPIO_1[22] <= GPIO_1[22]~22
GPIO_1[23] <= GPIO_1[23]~23
GPIO_1[24] <= GPIO_1[24]~24
GPIO_1[25] <= GPIO_1[25]~25
GPIO_1[26] <= GPIO_1[26]~26
GPIO_1[27] <= GPIO_1[27]~27
GPIO_1[28] <= GPIO_1[28]~28
GPIO_1[29] <= GPIO_1[29]~29
GPIO_1[30] <= GPIO_1[30]~30
GPIO_1[31] <= GPIO_1[31]~31
GPIO_1[32] <= GPIO_1[32]~32
GPIO_1[33] <= GPIO_1[33]~33
GPIO_1[34] <= GPIO_1[34]~34
GPIO_1[35] <= GPIO_1[35]~35


|DE2_synthesizer|SEG7_LUT_8:u0
oSEG0[0] <= SEG7_LUT:u0.port0
oSEG0[1] <= SEG7_LUT:u0.port0
oSEG0[2] <= SEG7_LUT:u0.port0
oSEG0[3] <= SEG7_LUT:u0.port0
oSEG0[4] <= SEG7_LUT:u0.port0
oSEG0[5] <= SEG7_LUT:u0.port0