📄 myled.vhd
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library ieee;
use ieee.std_logic_1164.all;
entity myled is
port(clk:in std_logic;
y:out std_logic_vector(7 downto 0));--8位流水灯输出
end myled;
-------------------------------------------------------------------
architecture bhv of myled is
signal b:integer range 0 to 7;
begin
a1:process(clk)
variable a:integer range 0 to 4000;--1秒计数,时钟频率4000Hz
begin
if clk'event and clk='1' then
if a<4000 then
a:=a+1;
else
a:=0;
b<=b+1;
end if;
end if;
end process;
-------------------------------------------------------------------
a2:process(b)
begin
if b=0 then --高电平亮,轮流亮过去
y<="00000001";
elsif b=1 then
y<="00000010";
elsif b=2 then
y<="00000100";
elsif b=3 then
y<="00001000";
elsif b=4 then
y<="00010000";
elsif b=5 then
y<="00100000";
elsif b=6 then
y<="01000000";
elsif b=7 then
y<="10000000";
end if;
end process;
end bhv;
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