cardbus_5632.vhh

来自「VHDLVERILOG语言实现的CARDBUS的IP源码,已经实现现场应用」· VHH 代码 · 共 50 行

entity cardbus_5632 is
      Port (    ir_n : In    STD_LOGIC;
                lclk : In    STD_LOGIC;
                 ren : Out   STD_LOGIC;
                  oe : Out   STD_LOGIC;
                or_n : In    STD_LOGIC;
                 wen : Out   STD_LOGIC;
                  ld : Out   STD_LOGIC;
               pae_n : In    STD_LOGIC;
               paf_n : In    STD_LOGIC;
                 lad : InOut STD_LOGIC_VECTOR (31 downto 0);
                 led : Out   STD_LOGIC_VECTOR (7 downto 0);
                 mrs : Out   STD_LOGIC;
             pad_CIS_ADR : Out   STD_LOGIC_VECTOR (9 downto 2);
             pad_CIS_data : In    STD_LOGIC_VECTOR (31 downto 0);
                REQN : Out   STD_LOGIC;
               SERRN : Out   STD_LOGIC;
               PERRN : InOut STD_LOGIC;
                 PAR : InOut STD_LOGIC;
                GNTN : In    STD_LOGIC;
               STOPN : InOut STD_LOGIC;
               IDSEL : In    STD_LOGIC;
             DEVSELN : InOut STD_LOGIC;
                RSTN : In    STD_LOGIC;
               TRDYN : InOut STD_LOGIC;
                 CLK : In    STD_LOGIC;
               IRDYN : InOut STD_LOGIC;
              FRAMEN : InOut STD_LOGIC;
                CBEN : InOut STD_LOGIC_VECTOR (3 downto 0);
                  AD : InOut STD_LOGIC_VECTOR (31 downto 0);
               INTAN : Out   STD_LOGIC;
             pad_CBLOCK_n : In    STD_LOGIC;
             pad_PWM : In    STD_LOGIC;
             pad_BAM : In    STD_LOGIC;
              pad_wp : In    STD_LOGIC;
             pad_ready : In    STD_LOGIC;
             pad_bvd : In    STD_LOGIC_VECTOR (2 downto 1);
             pad_gwake : In    STD_LOGIC;
             pad_intr : In    STD_LOGIC;
             pad_clk_resume : In    STD_LOGIC;
             pad_CCLKRUN_n : InOut STD_LOGIC;
             pad_owner_access : Out   STD_LOGIC;
             pad_locked : Out   STD_LOGIC;
             pad_clk_stopped : Out   STD_LOGIC;
             pad_CAUDIO : Out   STD_LOGIC;
             pad_CSTSCHG : Out   STD_LOGIC;
             pad_CINT_n : Out   STD_LOGIC );
end cardbus_5632;