cardbus_5632.sc

VHDLVERILOG语言实现的CARDBUS的IP源码,已经实现现场应用

#CARDBUS_5632.sc
#Synplicity Synthesis command file
#Automatically generated by ecs2spde version 9.5.3 Release Build1
#Date: 3/16/2004 at 18:06

#To turn off all Synplicity buffer insertion, uncommment the following line:
#option quicklogic ql_nobuffer=1;

#To turn off Synplicity buffer insertion on a pad
#by pad basis, use the following format per pad net:
#portprop net_name             ql_nobuffer=1;


#Include fixed I/O & FF placements from SCS or SpDE
include "CARDBUS_5632.scp";

option quicklogic ql_nobuffer=1;